| Electronic Components Datasheet Search |
|
Z80 Datasheet(PDF) 266 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
Z80 Datasheet(HTML) 266 Page - Zilog, Inc. |
|
266 / 330 page ![]() <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Serial Input/Output 246 insertion of sync characters when there is no data to send. CRC is not calculated on the automatically inserted sync characters. When the CPU detects the end of message, a Reset Transmit Underrun/EOM command can be issued. This action allows CRC to be sent when the transmitter has no data. In this case, the Z80 SIO sends CRC, followed by sync charac- ters, to terminate the message. There is no restriction as to when in the message the Transmit Underrun/ EOM bit can be reset. If Reset is issued after the first data character has been loaded, the 16-bit CRC is Sent and followed by sync characters the first time the transmitter has no data to send. Because of the Transmit Underrun condition, an External/Status interrupt is generated whenever the Transmit Underrun/EOM bit becomes set. In the case of sync insertion, an interrupt is generated only after the first automatically inserted sync character has been loaded. The status indicates the Transmit Underrun/ EOM bit and the Transmit Buffer Empty bit are set. In the case of CRC insertion, the Transmit Underrun/EOM bit is set and the Transmit Buffer Empty bit is reset while CRC is being sent. When CRC has been completely sent, the Transmit Buffer Empty status bit is set and an interrupt is generated to indicate to the CPU that another message can begin (this interrupt occurs because CRC has been sent and sync has been loaded). If no more messages are to be sent, the program can terminate transmission by resetting RTS, and disabling the transmitter (WR5, D3). Pad characters may be sent by setting the Z80 SIO to eight bits/transmit character and writing FF to the transmitter while sending CRC. Alterna- tively, the sync characters can be redefined as pad characters during this time. The following example clarifies this point. 1. The Z80 SIO interrupts with the Transmit Buffer Empty bit set. 2. The CPU recognizes that the last character (ETX) of the message has already been sent to the Z80 SIO by examining the internal program status. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |