 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
Z80 Datasheet(PDF) 294 Page - Zilog, Inc. |
|
|
|||||||||||||||||||||||||||||
Z80 Datasheet(HTML) 294 Page - Zilog, Inc. |
|
|
294 / 330 page  <%27 2GTKRJGTCNU 7UGT /CPWCN UM008101-0601 Serial Input/Output 274 Figure 114. Write Register 0 Pointer Bits (D2-D0) Bits D2-D0 are pointer bits that determine which write register the next byte writes to or which read register the next byte reads from. The first byte written to each channel after a reset (either by a Reset command or by the external reset input) goes to WR0. Following a read or write to any register (except WR0), the pointer points to WR0 Command Bits (D5-D3) Threebits, D5-D3, areencoded to issuethe seven basic Z80 SIO commands (Table 13). 00 01 10 11 00 0 00 1 01 0 01 1 10 0 10 1 11 0 11 1 00 0 00 1 01 0 01 1 10 0 10 1 11 0 11 1 Null Code Reset Rx CRC Checker Reset Tx CRC Generator Reset Tx Underrun/EOM Latch Register 0 Register 1 Register 2 Register 3 Register 4 Register 5 Register 6 Register 7 Null Code Send Abort (SDLC) Reset Ext/Status Interrupts Channel Reset Enable INT on Next Ax Character Reset TxINT Pending Error Reset Return from INT (CH-A Only) D7 D6 D5 D4 D3 D2 D1 D0 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
