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CS8900A Datasheet(PDF) 69 Page - Cirrus Logic |
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CS8900A Datasheet(HTML) 69 Page - Cirrus Logic |
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69 / 128 page ![]() DS271PP3 69 CS8900A Crystal LAN™ ISA Ethernet Controller CIRRUS LOGIC PRODUCT DATA SHEET 4.4.22 Register 19: Test Control (TestCTL, Read/Write, Address: PacketPage base + 0118h) TestCTL controls the diagnostic test modes of the CS8900A. 011001 These bits provide an internal address used by the CS8900A to identify this as the Test Control Register. DisableLT When set, the 10BASE-T interface allows packet transmission and reception regardless of the link status. DisableLT is used in conjunction with the LinkOK (Register 14, LineST, Bit 7) as fol- lows: LinkOK DisableLT 0 0 No packet transmission for reception allowed. Transmitter sends link impulses. 0 1 DisableLT overrides LinkOK to allow packet transmission and reception. Transmitter does not send link pulses. 1 N/A Disable has no meaning if LinkOK = 1. ENDECloop When set, the CS8900A enters internal loopback mode where the internal Manchester encoder output is connected to the decoder input. The 10BASE-T and AUI transmitters and receivers are disabled. When clear, the CS8900A is configured for normal operation. AUIloop When set, the CS8900A allows reception while transmitting. This facilitates loopback tests for the AUI. When clear, the CS8900A is configured for normal AUI operation. Disable Backoff When set, the backoff algorithm is disabled. The CS8900A transmitter looks only for completion of the inter packet gap before starting transmission. When clear, the backoff algorithm is used. FDX When set, 10BASE-T full duplex mode is enabled and CRS (Register 14, LineST, Bit E) is ig- nored. This bit must be set when performing loopback tests on the 10BASE-T port. When clear, the CS8900A is configured for standard half-duplex 10BASE-T operation. At reset, if no EEPROM is found by the CS8900A, then the register has the following initial state. If an EEPROM is found, then the register’s initial value may be set by the EEPROM. See Section 3.3 on page 19. Reset value is: 0000 0000 0001 1001 765 4321 0 DisableLT 011001 F E DCBA 9 8 FDX Disable Back- off AUIloop ENDEC loop |
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