CS8900A datasheet(97/128 Pages) CIRRUS

97 / 128 page

DS271PP3

CS8900A

Crystal LAN™ ISA Ethernet Controller

CIRRUS LOGIC PRODUCT DATA SHEET

Fram

e 1

Fram

e 2

Frame 3 starts to be received and passes the DA filter.

This activates Auto-Switch DMA.

Fram

e 3

Frame 1 is placed in host memory via DMA freeing

space for the incoming Frame 3. The CS8900A updates

the DMA Frame Count, DMA Start of Frame and DMA

Byte Count registers. It then sets the RxDMA DMAFrame

bit and generates an interrupt.

Frame 2 is placed in host memory via DMA and the

CS8900A updates the DMA registers.

The host responds to the RxDMAFrame interrupt, and

reads the Frame Count register, which is cleared when

read. Since there are no receive interrupts pending, the

CS8900A exits DMA (assumes Frame 3 is still coming in).

Receive DMA used

during this time.

At this point, the CS8900A does not have sufficient buffer

space for another complete large frame (1518 bytes).

Frame 1 received and completely stored in on-chip RAM.

Frame 2 received and completely stored in on-chip RAM.

Enter Example Here

Exit Example

Time

Frame 3 is completely buffered in on-chip RAM, and

awaits processing by the host.

Entering this example, the receive buffer is empty and the

DMA Frame Count (PacketPage base + 0028h) is zero.

Figure 27. Example of Auto-Switch DMA

CS8900A Datasheet(PDF) 97 Page - Cirrus Logic