CS8900A datasheet(93/128 Pages) CIRRUS

93 / 128 page

DS271PP3

CS8900A

Crystal LAN™ ISA Ethernet Controller

CIRRUS LOGIC PRODUCT DATA SHEET

In the interrupt service routine, the BufEvent regis-

ter (register C), bit RxDMA Frame (bit 7) indicates

that one or more receive frames were transferred

using DMA. The software driver should maintain a

pointer (e.g. PDMA_START) that will point to the

beginning of a new frame. After the CS8900A is

initialized and before any frame is received, pointer

PDMA_START points to the beginning of the

DMA buffer memory area. The first read of the

DMA Frame Count, CDMA, commits the memory

covered by the CDMA count, and the DMA cannot

overwrite this committed space until the space is

freed. The driver then processes the frames de-

scribed by the CDMA count and makes a second

read of the DMA frame count. This second read

frees the buffer memory space described by the

CDMA counter.

During the frame processing, the software should

advance the PDMA_START pointer. At the end of

processing a

frame, pointer

PDMA_START

should be made to align with a double-word bound-

ary. The software remains in the loop until the

DMA frame count read is zero.

5.5 Auto-Switch DMA

5.5.1 Overview

The CS8900A supports a unique feature, Auto-

Switch DMA, that allows it to switch between

Memory or I/O mode and Receive DMA automati-

cally. Auto-Switch DMA allows the CS8900A to

realize the performance advantages of Memory or

I/O mode while minimizing the number of missed

frames that could result due to slow processing by

the host.

RxStatus - Frame 1

RxLength - Frame 1

RxStatus - Frame 2

RxLength - Frame 2

Frame 2

RxStatus - Frame 3

RxLength - Frame 3

Frame 3

DMA Buffer

Base Address

Frame 1

DMA Byte Count

(PacketPage base + 012Ah)

DMA Start of Frame

base + 0126H)

points here.

"Holes" due to

double-word

alignment

Figure 24. Example of Frames Stored in DMA Buffer

CS8900A Datasheet(PDF) 93 Page - Cirrus Logic

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