DM9000 datasheet(10/54 Pages) ETC

10 / 54 page

DM9000

ISA to Ethernet MAC Controller with Integrated 10/100 PHY

Final

Version: DM9000-DS-F02

June 26, 2002

TXO-

TP TX Output

AVDD

TX Power

5.7 Miscellaneous

16,17,18,

TEST1~TEST4

Operation Mode

Test 1, 2, 3, 4 = (1, 1, 0, 0) in normal application

TEST5

It must be ground.

68,69,70,

GPIO0~3

I/O

General I/O Ports

Registers GPCR and GPR can program these pins

The GPIO0 is an output mode, and output data high at default is to power

down internal PHY and other external MII device

GPIO1~3 defaults are input ports

LINK_O

Cable Link Status Output. Active High

This pin is also used as a strap pin to define whether the MII interface is a

reversed MII interface (pulled high) or a normal MII interface (not pulled

high). This pin has a pulled down resistor about 60k ohm internally.

WAKEUP

Issue a wake up signal when wake up event happens

This pin has a pulled down resistor about 60k ohm internally.

PW_RST#

Power on Reset

Active low signal to initiate the DM9000

The DM9000 is ready after 5us when this pin deasserted

74,75,77

Not Connect

5.8 Power Pins

5,20,36,

55,72,90,

DVDD

Digital VDD

15,23,42,

58,63,81,

99,76

DGND

Digital GND

DM9000 Datasheet(PDF) 10 Page - List of Unclassifed Manufacturers

DM9000 Datasheet(HTML) 10 Page - List of Unclassifed Manufacturers

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

Datasheet Download

Link URL