DM9000 datasheet(13/54 Pages) ETC

13 / 54 page

DM9000

ISA to Ethernet MAC Controller with Integrated 10/100 PHY

Final

Version: DM9000-DS-F02

June 26, 2002

6.1 Network Control Register (00H)

Bit

Name

Default

Description

EXT_PHY

0,RW

Selects external PHY when set. Selects Internal PHY when clear. This bit will not

be affected after software reset

WAKEEN

0,RW

Wakeup Event Enable

When set, it enables the wakeup function. Clearing this bit will also clears all

wakeup event status

This bit will not be affected after a software reset

RESERVED

0,RO

Reserved

FCOL

0,RW

Force Collision Mode, used for testing

FDX

0,RW

Full-Duplex Mode. Read only on Internal PHY mode. R/W on External PHY mode

2:1

LBK

00,RW

Loopback Mode

Bit

2 1

Normal

MAC Internal loopback

Internal PHY 100M mode digital loopback

(Reserved)

RST

0,RW

Software reset and auto clear after 10us

6.2 Network Status Register (01H)

Bit

Name

Default

Description

SPEED

0,RO

Media Speed 0:100Mbps 1:10Mbps, when Internal PHY is used. This bit has no

meaning when LINKST=0

LINKST

0,RO

Link Status 0:link failed 1:link OK, when Internal PHY is used

WAKEST

0,RW/C1

Wakeup Event Status. Clears by read or write 1

This bit will not be affected after software reset

RESERVED

0,RO

Reserved

TX2END

0,RW/C1

TX Packet 2 Complete Status. Clears by read or write 1

Transmit completion of packet index 2

TX1END

0,RW/C1

TX Packet 1 Complete status. Clears by read or write 1

Transmit completion of packet index 1

RXOV

0,RO

RX FIFO Overflow

RESERVED

0,RO

Reserved

6.3 TX Control Register (02H)

Bit

Name

Default

Description

RESERVED

0,RO

Reserved

6TJDIS

0,RW

Transmit Jabber Disable

When set, the transmit Jabber Timer (2048 bytes) is disabled. Otherwise it is Enable

5EXCECM

0,RW

Excessive Collision Mode Control : 0:aborts this packet when excessive collision

counts more than 15, 1: still tries to transmit this packet

PAD_DIS2

0,RW

PAD Appends Disable for Packet Index 2

CRC_DIS2

0,RW

CRC Appends Disable for Packet Index 2

PAD_DIS1

0,RW

PAD Appends Disable for Packet Index 1

CRC_DIS1

0,RW

CRC Appends Disable for Packet Index 1

TXREQ

0,RW

TX Request. Auto clears after sending completely

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