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PCM5252 Datasheet(PDF) 5 Page - Texas Instruments

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Part # PCM5252
Description  Purepath Smart Amp PCM5252 4.2-VRMS DirectPath, 114-dB Audio Stereo Differential-
PDF  119 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

PCM5252 Datasheet(HTML) 5 Page - Texas Instruments

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PCM5252
www.ti.com
SLASE63 – NOVEMBER 2014
Pin Assignments (continued)
Table 1. PCM5252 Pin Functions (continued)
PIN
MODE, NAME
I/O
DESCRIPTION
PIN
I2C
SPI
HW
VCOM output (Optional mode selected by register; default setting is VREF
VCOM
O
I2C, SPI mode.) When in VREF mode (default), this pin ties to GND. When in VCOM
16
mode, decoupling capacitor to GND is required.
DEMP
I
HW
DEMP: De-emphasis control for 44.1kHz sampling rate: Off (Low) / On (High)
SDA
I/O
I2C
Data for I2C(2)(1)
MOSI
17
SPI
Input data for SPI(1)
I
ATT2
HW
Digital gain and attenuation control pin
SCL
I2C
Input clock for I2C(1)
MC
18
I
SPI
Input clock for SPI(1)
ATT1
HW
Digital gain and attenuation control pin
GPIO5
I2C, SPI General purpose digital input and output port (3)
19
I/O
ATT0
HW
Digital gain and attenuation control pin
GPIO4
I2C, SPI General purpose digital input and output port (3)
20
I/O
I2S Master clock select pin : Master (High) BCK/LRCK outputs, Slave (Low)
MAST
HW
BCK/LRCK inputs
GPIO3
I2C, SPI General purpose digital input and output port (3)
21
I/O
AGNS
HW
Analog gain selector : 0dB 2VRMS output (Low), -6dB 1VRMS output (High)
ADR2
I2C
2nd LSB address select bit for I2C(3)
I/O
GPIO2
22
SPI
General purpose digital input and output port (3)
GPO
O
HW
General Purpose Output (Low level)
Mode control selection pin(1)
MODE1 = Low, MODE2 = Low : Hardwired modeReserved
MODE1
23
I
MODE1 = Low, MODE2 = High: I2C mode
MODE1 = High: SPI mode
MODE2
MODE2
I2C, HW MODE2 (See definition in Mode 1 description)
24
MS
I
SPI
MS pin (chip select for SPI)
GPIO6
I/O
I2C, SPI General purpose digital input and output port
25
FLT
I
HW
Filter select : Normal latency (Low) / Low latency (High)
SCK
26
I
System clock input(1)
BCK
27
I/O
Audio data bit clock input (slave) or output (master)(1)
DIN
28
I
Audio data input(1)
29
-
NC
No connect
30
-
LRCK
31
I/O
Audio data word clock input (slave) or output (master)(1)
ADR1
I2C
LSB address select bit for I2C
MISO
Primary output data for SPI readback. Secondary; general purpose digital
32
I/O
SPI
(GPIO1)
input/output port controlled by register
FMT
HW
Audio format selection : I2S (Low) / Left justified (High)
(2)
Open-drain configuration in out mode.
(3)
Internal Pulldown
Copyright © 2014, Texas Instruments Incorporated
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