PCM5252 datasheet(96/119 Pages) TI1

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PCM5252

SLASE63 – NOVEMBER 2014

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RSV

Reserved

Reserved. Do not access.

L1OV

Left1 Overflow (Read Only)

This bit indicates whether the left channel of DSP first output port has overflow. This bit is sticky and is cleared

when read.

0: No overflow

1: Overflow occurred

R1OV

Right1 Overflow (Read Only)

The bit indicates whether the right channel of DSP first output port has overflow. This bit is sticky and is cleared

when read.

0: No overflow

1: Overflow occurred

L2OV

Left2 Overflow (Read Only)

This bit indicates whether the left channel of DSP second output port has overflow. This bit is sticky and is

cleared when read.

0: No overflow

1: Overflow occurred

R2OV

Right2 Overflow (Read Only)

The bit indicates whether the right channel of DSP second output port has overflow. This bit is sticky and is

cleared when read.

0: No overflow

1: Overflow occurred

SFOV

Shifter Overflow (Read Only)

This bit indicates whether overflow occurred in the DSP shifter (possible sample corruption). This bit is sticky

and is cleared when read.

0: No overflow

1: Overflow occurred

Page 0 / Register 91

Dec

Hex

RSV

DTFS2

DTFS1

DTFS0

DTSR3

DTSR2

DTSR1

DTSR0

Reset Value

RSV

Reserved

Reserved. Do not access.

DTFS[2:0]

Detected FS (Read Only)

These bits indicate the currently detected audio sampling rate.

000: Error (Out of valid range)

001: 8 kHz

010: 16 kHz

011: 32-48 kHz

100: 88.2-96 kHz

101: 176.4-192 kHz

110: 384 kHz

DTSR[3:0]

Detected SCK Ratio (Read Only)

These bits indicate the currently detected SCK ratio. Note that even if the SCK ratio is not indicated as error,

clock error might still be flagged due to incompatible combination with the sampling rate. Specifically the SCK

ratio must be high enough to allow enough DSP cycles for minimal audio processing when PLL is disabled. The

absolute SCK frequency must also be lower than 50 MHz.

0000: Ratio error (The SCK ratio is not allowed)

0001: SCK = 32 FS

0010: SCK = 48 FS

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