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PCM5252 Datasheet(PDF) 86 Page - Texas Instruments |
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PCM5252 Datasheet(HTML) 86 Page - Texas Instruments |
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86 / 119 page  PCM5252 SLASE63 – NOVEMBER 2014 www.ti.com Page 0 / Register 42 Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 42 2A RSV RSV AUPL1 AUPL0 RSV RSV AUPR1 AUPR0 Reset Value 0 1 0 1 RSV Reserved Reserved. Do not access. AUPL[1:0] Left DAC Data Path These bits control the left channel audio data path connection. Default value: 01 00: Zero data (mute) 01: Left channel data 10: Right channel data 11: Reserved (do not set) AUPR[1:0] Right DAC Data Path These bits control the right channel audio data path connection. Default value: 01 00: Zero data (mute) 01: Right channel data 10: Left channel data 11: Reserved (do not set) Page 0 / Register 43 Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 43 2B RSV RSV RSV PSEL4 PSEL3 PSEL2 PSEL1 PSEL0 Reset Value 0 0 0 0 1 RSV Reserved Reserved. Do not access. PSEL[4:0] DSP Program Selection These bits select the DSP program to use for audio processing. Default value: 00001 00000: Reserved (do not set) 00001: 8x/4x/2x FIR interpolation filter with de-emphasis 00010: 8x/4x/2x Low latency IIR interpolation filter with de-emphasis 00011: High attenuation x8/x4/x2 interpolation filter with de-emphasis 00100: Reserved 00101: Fixed process flow with configurable parameters 00110: Reserved (do not set) 00111: 8x Ringing-less low latency FIR interpolation filter without de-emphasis 11111: User program in RAM others: Reserved (do not set) Page 0 / Register 44 Dec Hex b7 b6 b5 b4 b3 b2 b1 b0 44 2C RSV RSV RSV RSV RSV CMDP2 CMDP1 CMDP0 Reset Value 0 0 0 86 Submit Documentation Feedback Copyright © 2014, Texas Instruments Incorporated Product Folder Links: PCM5252 |
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