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PM6344 Datasheet(PDF) 176 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 176 Page - PMC-Sierra, Inc |
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176 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 163 of frame 0 of the signaling multiframe to be inverted (i.e., the correct signaling multiframe alignment signal, 0000, is substituted with 1111); when set to logic 0, the signaling multiframe alignment signal is unchanged. REMAIS: The REMAIS bit controls the transmission of the remote Alarm Indication Signal. A logic 1 in the REMAIS bit position causes bit 3 of NFAS frames to be forced to logic 1; otherwise, bit 3 of NFAS frames is a logic 0. MFAIS: The MFAIS bit controls the transmission of the signaling multiframe Alarm Indication Signal. A logic 1 in the MFAIS bit position causes the y-bit (bit 6) of TS16 of frame 0 of the signaling multiframe to be forced to logic 1; otherwise, the y-bit is a logic 0. TS16AIS: The TS16AIS bit controls the transmission of the Time Slot 16 Alarm Indication Signal (all-ones in TS16). A logic 1 in the TS16AIS bit position forces TS16 of all frames in the output stream to logic 1. AIS: The AIS bit controls the transmission of the Alarm Indication Signal (unframed all-ones). A logic 1 in the AIS bit position forces the output streams to logic 1. When the EQUAD is reset, the contents of this register are set to logic 0. |
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