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PM6344 Datasheet(PDF) 173 Page - PMC-Sierra, Inc

Part # PM6344
Description  QUADRUPLE E1 FRAMER
PDF  256 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM6344 Datasheet(HTML) 173 Page - PMC-Sierra, Inc

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STANDARD PRODUCT
PMC-Sierra, Inc.
PM6344 EQUAD
PMC-951013
ISSUE 5
QUADRUPLE E1 FRAMER
160
is a logic 1, the contents of the TRAN International/National Bit Control
register are ignored and the values for those bit positions in the output stream
are taken directly from the BTPCM[x] stream. When INDIS and FDIS are
logic 0, the bit values used for the International and National bits are
dependent upon the values of the GENCRC and FEBEDIS configuration bits,
as shown in the following table:
GENCRC
FEBEDIS
Source of International/National bits
0
X
Bit position Si[1] in the
International/National Control Register is
used for the International bit in the frame
alignment signal (FAS) frames and the Si[0]
bit in the non-frame alignment signal (NFAS)
frames if INDIS is logic 0. TPCM replaces
Si[1:0] if INDIS is logic 1. Bit positions
Sn[4:0] in the register are used for the
National bits in NFAS frames.
1
0
The calculated CRC bits are used for the
International bit in the FAS frames and the
generated CRC multiframe alignment signal
and the FEBE bits are used for the
International bit in the NFAS frames. Bit
positions Sn[4:0] in the TRAN
International/National Control register are
used for the National bits in NFAS frames.
1
1
The calculated CRC bits are used for the
International bit in the FAS frames and the
generated CRC multiframe alignment signal
is used for the International bit in the NFAS
frames, with the Si[1:0] bits in the
International/National Control Register used
for the spare bits. Bit positions Sn[4:0] in
the register are used for the National bits in
NFAS frames.
XDIS:
If FDIS is logic 0 and SIGEN is logic 1, the XDIS bit controls the insertion of
the Extra bits in TS16 of frame 0 of the signaling multiframe as follows. When
XDIS is set to a logic 0, the contents of the TRAN Extra Bits Control Register
are inserted into TS16, frame 0; when XDIS is a logic 1, the contents of the
register are ignored and the values for those bits positions in the output



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