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PM6344 Datasheet(PDF) 171 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 171 Page - PMC-Sierra, Inc |
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171 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 158 Register 044H, 0C4H, 144H, 1C4H: TRAN Configuration Bit Type Function Default Bit 7 R/W AMI 0 Bit 6 R/W SIGEN 1 Bit 5 R/W DLEN 1 Bit 4 R/W GENCRC 0 Bit 3 R/W FDIS 0 Bit 2 R/W FEBEDIS 0 Bit 1 R/W INDIS 0 Bit 0 R/W XDIS 0 AMI: The AMI bit enables AMI line coding when set to logic 1; when it is set to logic 0, the HDB3 line coding is enabled. SIGEN, DLEN: The SIGEN and DLEN bits select the signaling data source for Time Slot 16 (TS16) as follows: SIGEN DLEN MODE 0 0 Signaling insertion disabled. TS16 data is taken directly from the input BTPCM[x] TS16. 0 1 CCS enabled. TS16 data is taken directly from the TDLSIG[x] input or from the HDLC/LAPD transmitter. 1 0 Reserved. 1 1 CAS enabled. TS16 data is taken from either BTSIG[x] stream or from the TPSC Data Control byte as selected on a per-timeslot basis via the SIGSRC bit. The format of the BTSIG[x] input data stream is shown in the "Functional Timing" section. |
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