PM6344 datasheet(169/256 Pages) PMC

169 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

156

10.1

SIGX Indirect Registers 96 (60H) - 127 (7FH) - Segment 4: Typical

Per-Timeslot Configuration and Signaling Trunk

Conditioning Data Register

Bit

Type

Function

Default

Bit 7

R/W

RINV[1]

Bit 6

R/W

RINV[0]

Bit 5

R/W

RTKCE

Bit 4

R/W

RDEBE

Bit 3

R/W

A’

Bit 2

R/W

B’

Bit 1

R/W

C’

Bit 0

R/W

D’

RINV[1:0]:

The RINV[1:0] bits select whether the output BRPCM stream is entirely or

selectively inverted. The bit mapping is as follows.

00 - do not invert

01 - invert even bits (2,4,6,8)

10 - invert odd bits (1,3,5,7)

11 - invert all bits

RTKCE:

The RTKCE bit enables per-timeslot data stream and signal stream trunk

conditioning. A logic 1 in this bit position enables trunk conditioning while a

logic 0 disables trunk conditioning. When RTKCE is enabled, per-timeslot

trunk conditioning data from one of the timeslot Trunk Conditioning Data

Registers (one of 40H to 5FH) is output onto the data stream, BRPCM. In

addition, the per-timeslot signaling trunk conditioning bits A’,B’,C’ and D’ are

output onto the signaling data stream, BRSIG.

PM6344 Datasheet(PDF) 169 Page - PMC-Sierra, Inc

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