PM6344 datasheet(175/256 Pages) PMC

175 / 256 page

STANDARD PRODUCT

PMC-Sierra, Inc.

PM6344 EQUAD

PMC-951013

ISSUE 5

QUADRUPLE E1 FRAMER

162

Bit

Type

Function

Default

Bit 7

R/W

MTRK

Bit 6

R/W

FPATINV

Bit 5

R/W

SPLRINV

Bit 4

R/W

SPATINV

Bit 3

R/W

REMAIS

Bit 2

R/W

MFAIS

Bit 1

R/W

TS16AIS

Bit 0

R/W

AIS

MTRK:

The MTRK bit forces trunk conditioning (i.e., idle code substitution and

signaling substitution) when MTRK is a logic 1. This has the same effect as

setting data substitution to IDLE code on time slots 1-15 and 17-31 (setting

bits SUBS and DS[0] to binary 10 in time slots 1-15 and 17-31) and sourcing

the signaling data from the TPCSC stream, if SIGEN is logic 1. When SIGEN

is logic 0, TS16 will be treated the same as time slots 1-15 and 17-31 and will

contain data sourced from TIDL. TS0 data is determined by the control bits

associated with it and is independent of the value of MTRK.

FPATINV:

The FPATINV bit is a diagnostic control bit. When set to logic 1, FPATINV

forces the frame alignment signal (FAS) written into TS0 to be inverted (i.e.,

the correct FAS, 0011011, is substituted with 1100100); when set to logic 0,

the FAS is unchanged.

SPLRINV:

The SPLRINV bit is a diagnostic control bit. When set to logic 1, SPLRINV

forces the "spoiler bit" written into bit 2 of TS0 of NFAS frames to be inverted

(i.e., the spoiler bit is forced to 0); when set to logic 0, the spoiler bit is

unchanged.

SPATINV:

The SPATINV bit is a diagnostic control bit. When set to logic 1, SPATINV

forces the signaling multiframe alignment signal written into bits 1-4 of TS16

PM6344 Datasheet(PDF) 175 Page - PMC-Sierra, Inc

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