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PM6344 Datasheet(PDF) 225 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 225 Page - PMC-Sierra, Inc |
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225 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 212 count becomes non-linear above a 10-4 BER. This must be taken into account when using CRC-4 counts to determine the BER. Since FEBEs are indications of CRCEs at the far end, and are accumulated identically to CRCEs, the same explanation holds for the FEBE event counter. Figure 34 - CRCE Count vs. BER 0 1000 200 400 600 800 1200 0 4 8 12 16 20 Average Count Over Many 1 Second Intervals CRC Error Event Count Per Second 13.7 Reset Procedure In the SIGX block that there is a small state machine which will not clear itself out if it happens to get in an all-ones state. The result is that the SIGX remains frozen after a reset. The probability that this state will occur is very small, about 1 in 3600 or about 0.028 percent probability of occurrence. If the SIGX function is not being used, then this condition is a don't care. To prevent this state from occurring hold the BRCLK and the BTCLK[4:1] signals low for at least 65ns (greater than one cycle of an 8x clock) after a hardware or software reset. If ELSTBYP is to be set, do not do so within 65ns of a hardware or software reset. For designs where it is not possible to implement the above hardware solution, the software solution is to perform a self-test after every reset. This self-test routine would use the TPSC functional block to source known signaling data, which would be looped back to the SIGX. If the SIGX can detect changes in the signaling data, then the SIGX block is okay; if it cannot detect changes in the signaling data, then a reset must be performed and the self-test repeated (until the SIGX is okay). |
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