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PM6344 Datasheet(PDF) 233 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 233 Page - PMC-Sierra, Inc |
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233 / 256 page ![]() STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 220 17 MICROPROCESSOR INTERFACE TIMING CHARACTERISTICS TA= -40° to +85°C, VDD=5V ±10% Table 10 - Microprocessor Read Access (Figure 35) Symbol Parameter Min Max Units tSAR Address to Valid Read Set-up Time 10 ns tHAR Address to Valid Read Hold Time 5 ns tSALR Address to Latch Set-up Time 10 ns tHALR Address to Latch Hold Time 10 ns tVL Valid Latch Pulse Width 20 ns tSLR Latch to Read Set-up 0 ns tHLR Latch to Read Hold 5 ns tPRD Valid Read to Valid Data Propagation Delay 80 ns tZRD Valid Read Negated to Output Tri-state 20 ns tZINTH Valid Read Negated to INTB high 50 ns |
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