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PM6344 Datasheet(PDF) 107 Page - PMC-Sierra, Inc |
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PM6344 Datasheet(HTML) 107 Page - PMC-Sierra, Inc |
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107 / 256 page  STANDARD PRODUCT PMC-Sierra, Inc. PM6344 EQUAD PMC-951013 ISSUE 5 QUADRUPLE E1 FRAMER 94 Register 013H, 093H, 113H, 193H: CDRC Alternate Loss of Signal Status Bit Type Function Default Bit 7 R/W ALTLOSE 0 Bit 6 R ALTLOSI X Bit 5 Unused X Bit 4 Unused X Bit 3 Unused X Bit 2 Unused X Bit 1 Unused X Bit 0 R ALTLOS X The alternate loss of signal status provides a more stringent criteria for the deassertion of the alarm. ALTLOSE: If the ALTLOSE bit is a logic 1, an interrupt is generated when the ALTLOS status bit changes state. ALTLOSI: The LOSI bit is set high when the ALTLOS status bit changes state. It is cleared when this register is read. ALTLOS: The ALTLOS bit is asserted when the number of consecutive zeros exceeds the threshold specified by the CDRC Configuration register. The ALTLOS bit is deasserted only after 255 bit periods during which no sequence of four zeros has been received. |
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