TAS5721 datasheet(24/78 Pages) TI1

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TAS5721

SLOS739A – JULY 2012 – REVISED MARCH 2016

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Feature Description (continued)

9.3.5 PWM Section

The TAS5721 DAP device uses noise-shaping and sophisticated non-linear correction algorithms to achieve high

power efficiency and high-performance digital audio reproduction. The DAP uses a fourth-order noise shaper to

increase dynamic range and SNR in the audio band. The PWM section accepts 24-bit PCM data from the DAP

and outputs up to three PWM audio output channels.

The PWM modulation block has individual channel dc blocking filters that can be enabled and disabled. The filter

cutoff frequency is less than 1 Hz. Individual channel de-emphasis filters for 44.1- and 48-kHz are included and

can be enabled and disabled.

Finally, the PWM section has an adjustable maximum modulation limit of 93.8% to 99.2%. It is important to note

that for any applications with PVDD greater than 18 V, the maximum modulation index must be set to 93.8%.

9.3.6 SSTIMER Functionality

The SSTIMER pin uses a capacitor connected between this pin and ground to control the output duty cycle when

exiting all-channel shutdown. The capacitor on the SSTIMER pin is slowly charged through an internal current

source, and the charge time determines the rate at which the output transitions from a near-zero duty cycle to the

desired duty cycle. This allows for a smooth transition that minimizes audible pops and clicks. When the part is

shut down, the drivers are placed in the high-impedance state and transition slowly down through a 3-k

Ω resistor,

similarly minimizing pops and clicks. The shutdown transition time is independent of the SSTIMER pin

capacitance. The SSTIMER capacitor size determines the start-up time, 2200 pF is the maximum recommended

value. The SSTIMER pin can be left floating when using BD modulation, but leaving the capacitor connected

does not represent any issue.

9.3.7 2.1-Mode Support

The TAS5721 uses a special mid-Z ramp sequence to reduce click and pop in SE-mode and 2.1-mode operation.

To enable the mid-Z ramp, register 0x05 bit D7 must be set to 1. To enable 2.1 mode, register 0x05 bit D2 must

be set to 1. The SSTIMER pin should be left floating in this mode.

9.3.7.1 Supply Pumping and Polarity Inversion for 2.1 Mode

The high degree of correlation between the left and right channels of a stereo audio signal dictates that, when

the left audio signal is positive, the right audio signal tends to be positive as well. When the Class D is configured

for single-ended operation (as would be the case for Single Device 2.1 Operation), this results in both outputs

drawing current from the supply rail "in phase". Similarly, when the left audio signal is negative, the right audio

signal tends to be negative as well. For single-ended operation, both outputs will likewise force current into the

ground rail. This can lead to a phenomenon called "supply pumping" in which the capacitances on the PVDD rail

begin to store charge- raising the voltage level of PVDD as well. This noise injection onto the rail is in phase with

and at a similar frequency of the signal being produced by the amplifier output stage. This phenomenon can

cause issues for other devices attached to the PVDD rail. The problem does not occur for BTL outputs since

outputs of both polarities are always present for each channel.

To combat supply pumping in 2.1 Mode, the device has an integrated speaker-mode volume negation feature,

which, essentially introduces a polarity inversion (shift by 180°) to any of the given channels. By setting the

correct bit in 0x20[31:24], it is possible to invert the polarity of the DAP channels that drive the PWM modulator

blocks. This allows, for instance, the left channel to operate with its default polarity, while the right channel could

have its polarity inverted to balance current flow into and out of the supplies. This procedure could have an

adverse implication on the stereo imaging of the audio system because, if the speakers in the system are

connected in the same manner as they would be connected when being driven by traditional BTL channels, the

phase of the signals being sent to the speakers is 180° out of phase. In order to prevent this from occurring, the

speaker on the negated channel must be connected "backwards" (i.e. the Class D signal for the negated channel

gets connected to the negative speaker terminal and the positive terminal is grounded). In this way, supply

pumping is reduced while keeping the effective signal polarity the same. The table above includes register

settings which enable the polarity inversion, so care should be taken to adjust the polarity of the speakers if this

feature is left enabled. Of course this feature can be left disabled if desired, provided the supply pumping

phenomenon doesn't cause any other system level issues

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