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TAS5721 Datasheet(PDF) 45 Page - Texas Instruments

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Part # TAS5721
Description  Digital Audio Power Amplifier With EQ, DRC, 2.1 Support, and Headphone/Line Driver
PDF  78 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TAS5721 Datasheet(HTML) 45 Page - Texas Instruments

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TAS5721
www.ti.com
SLOS739A – JULY 2012 – REVISED MARCH 2016
Product Folder Links: TAS5721
Submit Documentation Feedback
Copyright © 2012–2016, Texas Instruments Incorporated
(1)
Default values are in bold.
9.6.4 System Control Register 1 (0x03)
The system control register 1 has several functions:
Bit D7:
If 0, the dc-blocking filter for each channel is disabled.
If 1, the dc-blocking filter (–3 dB cutoff < 1 Hz) for each channel is enabled (default).
Bit D5:
If 0, use soft unmute on recovery from clock error. This is a slow recovery. Unmute takes the
same time as the volume ramp defined in register 0x0E.
If 1, use hard unmute on recovery from clock error (default). This is a fast recovery, a single step
volume ramp
Bits D1–D0: Select de-emphasis
Table 8. System Control Register 1 (0x03)
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
0
–
–
–
–
–
–
–
PWM high-pass (dc blocking) disabled
1
–
–
–
–
–
–
–
PWM high-pass (dc blocking) enabled (1)
–
0
–
–
–
–
–
–
Reserved (1)
–
–
0
–
–
–
–
–
Soft unmute on recovery from clock error
–
–
1
–
–
–
–
–
Hard unmute on recovery from clock error (1)
–
–
–
0
–
–
–
–
Reserved (1)
–
–
–
–
0
–
–
–
Reserved (1)
–
–
–
–
–
0
–
–
Reserved(1)
–
–
–
–
–
–
0
0
No de-emphasis (1)
–
–
–
–
–
–
0
1
De-emphasis for fS = 32 kHz
–
–
–
–
–
–
1
0
De-emphasis for fS = 44.1 kHz
–
–
–
–
–
–
1
1
De-emphasis for fS = 48 kHz
(1)
Default values are in bold.
9.6.5 Serial Data Interface Register (0x04)
As shown in Table 9, the TAS5721 supports nine serial data modes. The default is 24-bit, I2S mode,
Table 9. Serial Data Interface Control Register (0x04) Format
RECEIVE SERIAL DATA
INTERFACE FORMAT
WORD
LENGTH
D7–D4
D3
D2
D1
D0
Right-justified
16
0000
0
0
0
0
Right-justified
20
0000
0
0
0
1
Right-justified
24
0000
0
0
1
0
I2S
16
000
0
0
1
1
I2S
20
0000
0
1
0
0
I2S (1)
24
0000
0
1
0
1
Left-justified
16
0000
0
1
1
0
Left-justified
20
0000
0
1
1
1
Left-justified
24
0000
1
0
0
0
Reserved
0000
1
0
0
1
Reserved
0000
1
0
1
0
Reserved
0000
1
0
1
1
Reserved
0000
1
1
0
0
Reserved
0000
1
1
0
1
Reserved
0000
1
1
1
0
Reserved
0000
1
1
1
1



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