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EM6517 Datasheet(PDF) 5 Page - EM Microelectronic - MARIN SA |
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EM6517 Datasheet(HTML) 5 Page - EM Microelectronic - MARIN SA |
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5 / 64 page ![]() EM6517 03/02 REV. C/448 Copyright 2002, EM Microelectronic-Marin SA 5 www.emmicroelectronic.com 2 Typical configurations Full range ADC : Vref = VDD, Vgnd = VDD/2. For power saving one might connect the Vgnd resistor divider chain onto a port B output. This output should be driving VDD during the conversion and driving VSS or high impedance in the ADC off state. Limited range ADC : VDD > Vref > Vgnd, Vgnd=VDD/2. For power saving one might connect the Vgnd and the Vref resistor divider chain onto a port B output to VSS. This output should be driving VDD during the conversion and driving Vss or high impedance in the ADC off state. other possibility: VREF = VregLogic, VGND = VregLogic/2 For power saving one might connect the Vgnd resistor divider chain from VregLogic onto a port B output. This output should be driving VSS during the conversion and driving ‘high impedance’ in the ADC off state. Figure 3. Typical Application, Full Range Main power ≈ Vreg VSS Vss R1 R1 Vss Ain Bin Port C Port B Strobe Reset Port A Vref Vgnd VDD VDD, or port driven VDD 32 KHz >1.3V VDD Vss Vgnd + - Full range ADC Figure 4. Typical Application, Limited Range Main power ≈ Vreg Vss Vss or Vgnd >1.3V Vdd or Port B driven R1 C1 R1 Vss Ain Bin Vref Vgnd VDD 32 KHz limited range ADC Vref Vref Vgnd + - Vdd Vss +| Vref - Vgnd | -| Vref - Vgnd | Port C Port B Strobe Reset Port A |
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