EM6517 datasheet(19/64 Pages) EMMICRO

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EM6517

03/02 REV. C/448

 2002, EM Microelectronic-Marin SA

www.emmicroelectronic.com

7.4.4 PWM and Frequency Output

PB[3] can also be used to output the PWM (Pulse Width Modulation) signal from the 10-Bit Counter, the

Ck[11], Ck[16] as well as the Ck[12] prescaler frequencies.

-Selecting PWM output on PB[3] with bit PWMOn in register RegPresc and running the counter.

-Selecting Ck[11] output on PB[2] with bit PB1kHzOut in register OPTFSelPB

-Selecting Ck[16] output on PB[1] with bit PB32kHzOut in register OPTFSelPB

-Selecting Ck[12 ] output on PB[0] with bit PB2kHzOut in register OPTFSelPB

7.5 Port B registers

Table 7.5.1 Register RegPBData

Bit

Name

Reset

R/W

Description

PBData[3]

R/W*

PB[3] input and output

PBData[2]

R/W*

PB[2] input and output

PBData[1]

R/W*

PB[1] input and output

PBData[0]

R/W*

PB[0] input and output

R* : Direct read on pin (not the internal register read).

Table 7.5.2 Register RegPBCntl

Bit

Name

Reset

R/W

Description

PBIOCntl[3]

R/W

I/O control for PB[3]

PBIOCntl[2]

R/W

I/O control for PB[2]

PBIOCntl[1]

R/W

I/O control for PB[1]

PBIOCntl[0]

R/W

I/O control for PB[0]

Default "0" is: Port B in input mode

Table 7.5.3 Register OPTFSelPB

Bit

Name

power on

value

R/W

Description

PB1kHzOut

R/W

ck[11] output on PB[2]

PB32kHzOut

R/W

ck[16] output on PB[1]

PB2kHzOut

R/W

ck[12] output on PB[0]

InpResSleep

R/W

Reset From SLEEP with Port A

Default "0" is: No frequency output, port A Input reset can not reset the SLEEP mode.

Table 7.5.4 Option Register OPTNoPdPB

Bit

Name

power on

value

R/W

Description

NoPdPB[3]

R/W

No pull-down on PB[3]

NoPdPB[2]

R/W

No pull-down on PB[2]

NoPdPB[1]

R/W

No pull-down on PB[1]

NoPdPB[0]

R/W

No pull-down on PB[0]

Default "0" is: Pull-down on

Table 7.5.5 Option Register OPTNchOpDPB

Bit

Name

power on

value

R/W

Description

NchOpDPB[3]

R/W

N-Channel Open Drain on PB[3]

NchOpDPB[2]

R/W

N-Channel Open Drain on PB[2]

NchOpDPB[1]

R/W

N-Channel Open Drain on PB[1]

NchOpDPB[0]

R/W

N-Channel Open Drain on PB[0]

Default "0" is: CMOS on PB[3..0]

EM6517 Datasheet(PDF) 19 Page - EM Microelectronic - MARIN SA

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