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EM6517 Datasheet(PDF) 33 Page - EM Microelectronic - MARIN SA |
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EM6517 Datasheet(HTML) 33 Page - EM Microelectronic - MARIN SA |
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33 / 64 page ![]() EM6517 03/02 REV. C/448 Copyright 2002, EM Microelectronic-Marin SA 33 www.emmicroelectronic.com 10 2-Channel ADC (8-bit digital converter) The EM6517 contains one 8-bit ADC with 2 independent input channels. In addition one can choose also Vref and Vgnd as ADC input. The control logic uses an internal analogue multiplexor to select the channel to be converted. When data conversion is complete, indicated by a DATA VALID signal, the control logic saves the converted value in the RegADCDataH and the Shadow Low registers. RegADCDataL registers is updated when reading the RegADCDataH register. At the end of conversion an interrupt IRQADC is sent to the µP. The architecture of the ADC is illustrated in Figure 25. The ADC 8 bit contains an inherent sample and hold function : the input voltage is sampled during acquisition phase (2 clock cycles) and is held until the end of conversion. Total conversion time is 10 clock cycles. Figure 25. ADC 8 Bit Architecture 8-BIT CHARGE REDISTRIBUTION ADC CORE 4-Bit Internal Data Bus RdHigh IRQ RdLow RegADCDataL RdLow Shadow Low RegADCDataH RdHigh 4 SVref1/2Sel Start Convert Channel select Vgnd VrefInt Vref1 Vref2 Vref Vin Convert Data[7 :1] Data Valid AIN BIN 0 3 1 2 8 2 VDD Vgnd VDD VSS IRQADC Ck[16] Control Logic External Figure 26. ADC 8 Bit Timing Start Convert ADC Clock 1 9 8 7 6 5 4 3 2 10 Data Valid Re-sampling 8 clocks conversion Sample&Hold IRQADC |
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