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IC-GD Datasheet(PDF) 8 Page - IC-Haus GmbH |
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IC-GD Datasheet(HTML) 8 Page - IC-Haus GmbH |
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8 / 55 page  prel imin ary prel imin ary iC-GD UNIVERSAL I/O INTERFACE Rev A1, Page 8/55 ELECTRICAL CHARACTERISTICS Operating conditions: VB = 14.5...16 V, VNB = -15 V ±1 V, VDA = 18...36 V or VDA = VB, VCC = 3.3...5 V ±5%, RREF = 20 kΩ ±0.1% TK5, Tj = -20...105 °C, if not otherwise stated Item Symbol Parameter Conditions Unit No. Min. Typ. Max. SPI Interface 501 fscl Maximum Permissible Clock Frequency I2C 100 kHz 502 fclk Maximum Permissible Clock Frequency SPI Internal oscillator calibrated 12.5 MHz 503 fclk_na Maximum Permissible Clock Frequency SPI Internal oscillator not calibrated 6.0 MHz 504 tCL Minimum Time SCLK low Low defined by TTL threshold Vt()lo 32.5 ns 505 tCH Minimum Time SCLK high High defined by TTL threshold Vt()hi 22 ns 506 tSU Setup Time: SDI valid before SCLK → low Validity defined by Vt()lo or Vt()hi 3 ns 507 tH Hold Time: SDI valid to SCLK → low Validity defined by Vt()lo or Vt()hi 15 ns 508 tPOmin Output Delay SDO → valid to SCLK → high Validity defined by Vs()lo or Vs()hi, CL(SDO) ≤ 30 pF 0 ns 509 tPOmax Output Delay SDO → valid to SCLK → high Validity defined by Vs()lo or Vs()hi, CL(SDO) ≤ 30 pF 30 ns 510 tPOT Output Delay SDO → tri-state to NCS → high 50 ns 511 tCSU Setup Time: NCS → low before SCLK → low Internal oscillator calibrated 50 ns 512 tCSU_na Setup-Time: NCS → low before SCLK → low Internal oscillator not calibrated 75 ns 513 tCSH Hold Time: NCS → high to SCLK → high Internal oscillator calibrated 200 ns 514 tCSH_na Hold Time: NCS → high to SCLK → high Internal oscillator not calibrated 300 ns 515 tD Minimum Time NCS high hi defined by TTL threshold Vt()hi, internal oscillator calibrated 100 ns 516 tD_na Minimum Time NCS high hi defined by TTL threshold Vt()hi, internal oscillator not calibrated 150 ns 5 V Regulator VPA, VPD 601 V(VPA) Voltage at VPA CVPA = 100 nF, bandgap calibrated 5 5.25 5.5 V 602 Isc(VPA) Short-Circuit Current from VPA VPA = 0 V -100 -10 mA 603 VtUlo Lower Undervoltage Threshold VPA 3.5 4 V 604 VtUhi Upper Undervoltage Threshold VPA 4.4 4.75 V 605 VtUhys Hysteresis Undervoltage VPA 200 400 800 mV 606 V(VPD) Voltage at VPD CVPD = 100 nF, bandgap calibrated 5 5.25 5.5 V 607 Isc(VPD) Short-Circuit Current from VPD VPD = 0 V -120 -15 mA 608 VtUlo Lower Undervoltage Threshold VPD 3.3 3.8 V 609 VtUhi Upper Undervoltage Threshold VPD 4.2 4.6 V 610 VtHys Hysteresis Undervoltage VPD 200 400 800 mV Voltage Monitor VB, VNB, VCC, VDA 701 Vt(VB)lo Lower Undervoltage Threshold VB 12.6 13.3 V 702 Vt(VB)hi Upper Undervoltage Threshold VB 13.9 14.4 V 703 V(VB)hys Hysteresis Undervoltage VB VBhys = Vt(VB)hi − Vt(VB)lo 200 500 800 mV 704 Vt(VNB)lo Upper Undervoltage Threshold VNB -13 -12.3 V |
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