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IC-GD Datasheet(PDF) 42 Page - IC-Haus GmbH

Part # IC-GD
Description  UNIVERSAL I/O INTERFACE
PDF  55 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-GD Datasheet(HTML) 42 Page - IC-Haus GmbH

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iC-GD
UNIVERSAL I/O INTERFACE
Rev A1, Page 42/55
erated combinatorial and therefore can neither be writ-
ten nor reset. To clear these bits, either CH_STAT_REG
must be read whereby set bits are reset or the detection
must be deactivated in EN_IRQ_FLAG_REG. Figure 7
shows the connection between the registers CH_STAT,
SPV and IRQ_FLAGS.
IRQ_FLAG_REG
/
R - NA
bit 6:0
Active interrupts of CH_STAT_REG_1P
bit 7
Sum of active interrupts of
CH_STAT_REG_1S and CH_STAT_REG_2S
bit 14:8
Active interrupts of CH_STAT_REG_2P
bit 15
Sum of activen interrupts of SPV_REG
Table 38: IRQ-Flag-Register
REGISTER MAP
Addr
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Configuration channel 1
0x00
ENVIF_1
IO_SEL_1S(2:0)
DO_12
IO_SEL_1P(2:0)
0x01
SYNC_INV_1
SYNC_SEL_1(1:0)
DIO_INV_1
DO_SEL_1(1:0)
DI_SEL_1(1:0)
0x02
ENDOSC_1
CNT_E2R_1
VO_EC_1
CO_SEL_1(1:0)
VICI_SEL_1(2:0)
0x03(A)
CNT_DUAL
CNT_SEL_1(2:0)
CNT_CBE_1
CNT_DNU_1
CNT_RAR_1
CNT_DCB_1
0x03(B)
CNT_DUAL
CNT_SEL_1(2:0)
(unused)
PWM_LAP_1 PWM_AZP_1
PWM_HS_1
0x03(C)
TM_SEL_1(4:0)
0x04
AI_LOWER_1(15:8)
0x05
AI_LOWER_1(7:0)
0x06
AI_UPPER_1(15:8)
0x07
AI_UPPER_1(7:0)
0x08
EN_CH_STAT_1S(3:0)
EN_CH_STAT_1P(3:0)
0x09
SPIKE_FIL_1(3:0)
DIG_FIL_1(3:0)
Configuration channel 2
0x10
ENVIF_2
IO_SEL_2S(2:0)
DO_ADR0_2
IO_SEL_2P(2:0)
0x11
SYNC_INV_2
SYNC_SEL_2(1:0)
DIO_INV_2
DO_SEL_2(1:0)
DI_SEL_2(1:0)
0x12
ENDOSC_2
(unused)
VO_EC_2
CO_SEL_2(1:0)
VICI_SEL_2(2:0)
0x13(A)
(unused)
CNT_SEL_2(2:0)
CNT_CBE_2
CNT_DNU_2
CNT_RAR_2
CNT_DCB_2
0x13(B)
(unused)
CNT_SEL_2(2:0)
(unused)
(unused)
PWM_AZP_2
PWM_HS_2
0x13(C)
TM_SEL_2(4:0)
0x14
AI_LOWER_2(15:8)
0x15
AI_LOWER_2(7:0)
0x16
AI_UPPER_2(15:8)
0x17
AI_UPPER_2(7:0)
0x18
EN_CH_STAT_2S(3:0)
EN_CH_STAT_2P(3:0)
0x19
SPIKE_FIL_2(3:0)
DIG_FIL_2(3:0)
Digital filter setting
0x1B
FIL_ITP_1
FIL_HB_1
FIL_ITP_2
FIL_HB_2
SPV_INT
0x1F
ST_VPD
ST_VPA
ST_VBG
ST_PLL



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