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IC-GD Datasheet(PDF) 27 Page - IC-Haus GmbH

Part # IC-GD
Description  UNIVERSAL I/O INTERFACE
PDF  55 Pages
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Manufacturer  ICHAUS [IC-Haus GmbH]
Direct Link  http://www.ichaus.biz
Logo ICHAUS - IC-Haus GmbH

IC-GD Datasheet(HTML) 27 Page - IC-Haus GmbH

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iC-GD
UNIVERSAL I/O INTERFACE
Rev A1, Page 27/55
Name
Internal address
Hints and further settings
ATK
0x2C
AITKL
0x69
AITKQ, AOCT 0x7F
AITKQ: bits(7:5), AOCT: bits(4:0)
AOSZ
0x68
Requires a waiting time of 200 µs after writing
AGVP1h
0x28
AGVN1h
0x29
AGVP2h
0x2A
AGVN2h
0x2B
AGVsxl
0x1F
AOIA1
0x1E
AOIA2
0x2F
AGIAm1
0x1D
AGIAm2
0x2E
AGFn1
0x0E – 0x0F
REG(0x0C) = 0x5C, REG(0x3A) = 0xFF (*)
AGFn2
0x0E – 0x0F
REG(0x0C) = 0x5D, REG(0x3A) = 0xFF (*)
AOFn1
0x0E – 0x0F
REG(0x0C) = 0x5E, REG(0x3A) = 0xFF (*)
AOFn2
0x0E – 0x0F
REG(0x0C) = 0x5F, REG(0x3A) = 0xFF (*)
Table 17: Internal calibration register addresses
(*) The order is relevant. First, the date, then the fur-
ther settings in order as shown in table 15 must be set.
Register 0x3A acts as trigger.
ATK – Bandgap TK
AOCT – Chip temperature measurement offset
AITKQ, AITKL – Current measurement resistor TK
The calibration of the bandgap, the chip temperature
and the current- measurement resistor is performed
during chip-production. The values are stored on-chip
(OTP). A read access is possible via the register table
according to table 17.
AOSZ oscillator
The calibration of the oscillator is done via the register
AOSZ(6:0) in the range of approx. ±31.5% with a res-
olution of approx. 0.5%. To this end, a divided integer
frequency of the internal clock (PWM) can either be
output at the digital output IA1 or at pin SYNC1.
For output at IA1, the counter can be used in PWM
mode. The output at the SYNC1 pin requires an ad-
ditional command according to table 18. It shows the
output of a 10 kHz signal at pin SYNC1 by way of ex-
ample. Determined by the system, the first period is
approx. 80 ns shorter when output at pin SYNC1.
The oscillator must not be operated over its nominal fre-
quency, since this can crash the internal µC and cause
data errors. Thus during start-up, the lowest possible
frequency is used. When reading the frequency from
the EEPROM after start-up, the value is only accepted
if the respective CRC is correct.
There are no limitations for the calibration mode. For
calibration, two iterations of the following equation
with a start value of AOSZ0 = -63 are usually required.
Based on AOSZn and fmess, the respective valid equa-
tion must be selected (4 cases).
Attention should be paid to the format of AOSZ accord-
ing to table 16 which does not represent a two’s com-
plement value. The start value corresponds to 0xFE
(left-aligned, LSB unused, MSB = sign, remainder =
value) in the EEPROM.
Command
Effect
BX 00 06
IO_SEL_1P = CNT
BX 01 43
SYNC_SEL_1 = DISO
BX 03 31
Counter value 1 = PWM in HS
mode
DX 28 03200190 Tges = 100 µs, Thigh = 50 µs
0X 80
PROCESS DATA 1 = ’1’ (PWM
on)
For additional output via SYNC1 only:
BX 39 AA
Activate calibration mode
BX 25 80
Start output PWM → SYNC1
* Measurement *
BX 25 00
Stop output PWM → SYNC1
BX 39 A5
Deactivate calibration mode
Table 18: Calibration AOSZ



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