AD7761 datasheet(41/76 Pages) AD

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AD7761

Data Sheet

Rev. A | Page 40 of 75

ANALOG INPUTS

Figure 58 shows the AD7761 analog front end. The electrostatic

discharge (ESD) protection diodes that are designed to protect

the ADC from some short duration overvoltage and ESD events

are shown on the signal path. The analog input is sampled at

twice the modulator sampling frequency, fMOD, which is derived

from MCLK. By default, the ADC internal sampling capacitors,

CS1 and CS2, are driven by a per channel analog input precharge

buffer to ease the driving requirement of the external network.

BPS 0+

AVDD1

AIN0+

CS2

PHI 0

PHI 1

PHI 0

CS1

AIN0–

AVSS

AVDD1

BPS 0–

Figure 58. Analog Front End

The analog input precharge buffers, if enabled, are enabled for a set

period of time for each fMOD cycle. The period of time is dependent

on the power mode of the AD7761. The precharge buffer is on for

approximately 15 ns in fast mode, 29 ns in median mode, and

116 ns in low power mode. For the initial rough charging of the

switched capacitor network, the bypass switches, BPS 0+ and

BPS 0−, remain open during this first phase. For the remaining

phase, the bypass switches are closed, and the fine accuracy

settling charge is provided by the external source. PHI 0 and PHI 1

represent the modulator clock sampling phases that switch the

input signals onto the sampling capacitors, CS1 and CS2.

The analog input precharge buffers reduce the switching kickback

from the sampling stage to the external circuitry. The precharge

buffer reduces the average input current by a factor of eight, and

makes the input current more signal independent, to reduce the

effects of sampling distortion. This reduction in drive requirements

allows pairing of the AD7761 with lower power, lower bandwidth

front-end driver amplifiers such as the ADA4940-1/ADA4940-2.

–400

–300

–200

–100

100

200

300

400

INPUT VOLTAGE (VDIFF)

UNBUFFERED AINx+

UNBUFFERED AINx–

Figure 59. Analog Input Current (AIN) vs. Input Voltage, Analog Input

Precharge Buffer Off, VCM = 2.5 V, fMOD = 8.192 MHz

–30

–25

–20

–15

–10

–5

INPUT VOLTAGE (VDIFF)

PRECHARGE BUFFERED AINx+

PRECHARGE BUFFERED AINx–

Figure 60. Analog Input Current (AIN) vs. Input Voltage, Analog Input

Precharge Buffer On, VCM = 2.5 V, fMOD = 8.192 MHz

The analog input precharge buffers can be turned on/off by

means of a register write to Register 0x11 and Register 0x12

(Precharge Buffer Register 1 and Precharge Buffer Register 2,

respectively). When writing to these registers, the user must

write the inverse of the required bit settings. For example, to

clear Bit 1 of this register, the user must write 0x01 to the

the register again after writing 0x01, the data read is 0xFE, as

required.

Each analog input precharge buffer is selectable per channel. In

pin control mode, the analog input precharge buffers are always

enabled for optimum performance.

When the analog input precharge buffers are disabled, the

analog input current is sourced completely from the analog

input source. The unbuffered analog input current is calculated

from two components: the differential input voltage on the

analog input pair, and the analog input voltage with respect to

AVSS. With the precharge buffers disabled, for 32.768 MHz

MCLK in fast mode with fMOD = MCLK/4, the differential input

current is approximately 48 µA/V and the current with respect

to ground is approximately 17 µA/V.

For example, if the precharge buffers are off, with AIN1+ = 5 V,

and AIN1− = 0 V, estimate the current in each input pin as

follows:

AIN1+ = 5 V × 48 µA/V + 5 V × 17 µA/V = 325 µA

AIN1− = −5 V × 48 µA/V + 0 V × 17 µA/V = −240 µA

When the precharge buffers are enabled, the absolute voltage with

respect to AVSS determines the majority of the current. The

maximum input current of approximately −25 µA is measured

when the analog input is close to either the AVDD1 or AVSS rails.

With either precharge buffers enabled or disabled, the analog

input current scales linearly with the modulator clock rate. The

analog input current vs. input voltage is shown in Figure 59.

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