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AD7761 Datasheet(PDF) 44 Page - Analog Devices

Part # AD7761
Description  8-Channel, 16-Bit, Simultaneous Sampling ADC with Power Scaling, 110.8 kHz BW
PDF  76 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD7761 Datasheet(HTML) 44 Page - Analog Devices

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Data Sheet
AD7761
Rev. A | Page 43 of 75
Wideband Low Ripple Filter
The wideband filter, referred to as a brick wall filter, has a low ripple
pass band, within ±0.005 dB of ripple, of 0.4 × ODR. The wideband
filter has full attenuation at 0.499 × ODR (Nyquist), maximizing
antialias protection. The wideband filter has a pass-band ripple of
±0.005 dB and a stop band attenuation of 105 dB from Nyquist
out to fCHOP. For more information on antialiasing and fCHOP
aliasing, see the Antialiasing section.
The wideband filter is a very high order digital filter with a group
delay of approximately 34/ODR. After a synchronization pulse,
there is an additional delay from the SYNC_IN rising edge to
fully settled data. The settling times for the AD7761 when using
the wideband filter are shown in Table 25. See Table 10 for the
noise performance of the wideband filter across power modes
and decimation rates.
Filter Settling Time
The AD7761 digital filters are resynchronized on the rising edge
of the SYNC_IN signal. This resynchronization should be
provided after power-up in pin control mode or SPI control
mode, and after any reconfiguration of the device in SPI control
mode, prior to capturing ADC samples. Once the SYNC_IN
rising edge is provided, there is a deterministic delay until the
first new conversion result is available, and until the first settled
data is available.
Table 25 and Table 26 provide these delays, measured in MCLK
cycles, for wideband and sinc5 filters, respectively, for each
possible setting of MCLK_DIV. Each table provides the delays
for configurations in which all channels are using the exact
same configuration (Group B unused), and for configurations
in which one or more channels have a different decimation rate
applied (Group B is used).
For example, if a user configures channels with the wideband
filter and MCLK_DIV = MCLK/4, and assigns some channels
to Group A with decimate x32 and others to Group B with
decimate x64, then the delay until the first DRDY after the
SYNC_IN is 758 MCLK periods. All active channels then output
the first data after 758 MCLK periods. However, due to differing
decimation rates across channels, in this case the first settled
data becomes available for the Group A channels 8,822 MCLK
periods after SYNC_IN, and after 17,014 MCLK periods for
Group B channels.
0
–10
–30
–50
–70
–90
–100
–110
–120
–130
–140
0
0.2
0.1
0.3
0.4
0.5
0.6
0.7
0.9
0.8
1.0
NORMALIZED INPUT FREQUENCY (
fIN/fODR)
–20
–40
–60
–80
Figure 64. Wideband Filter Frequency Response
–0.010
0.010
0.008
–0.008
0.006
–0.006
0.004
–0.004
0.002
–0.002
0
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
NORMALIZED INPUT FREQUENCY (
fIN/fODR)
Figure 65. Wideband Filter Pass-Band Ripple
1.2
1.0
0.8
0.6
0.4
0.2
0
–0.2
0
10
20
30
40
50
60
70
80
OUTPUT DATA RATE SAMPLES
Figure 66. Wideband Filter Step Response



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