Electronic Components Datasheet Search
  English  ▼

X  

MFC2000 Datasheet(PDF) 401 Page - List of Unclassifed Manufacturers

Part # MFC2000
Description  Multifunctional Peripheral Controller 2000
PDF  426 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  ETC [List of Unclassifed Manufacturers]
Direct Link  
Logo ETC - List of Unclassifed Manufacturers

MFC2000 Datasheet(HTML) 401 Page - List of Unclassifed Manufacturers

Back Button MFC2000 Datasheet HTML 397Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 398Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 399Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 400Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 401Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 402Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 403Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 404Page - List of Unclassifed Manufacturers MFC2000 Datasheet HTML 405Page - List of Unclassifed Manufacturers Next Button
Zoom Inzoom in Zoom Outzoom out
 401 / 426 page
background image
Hardware Description
MFC 2000 Multifunctional Peripheral Controller 2000
100723A
Conexant
24-15
Bit 15-0
Block size in halfwords
Block size = Block Size Register + 1.
If this parameter is zero, the channel should be considered improperly
configured and not enabled. Also, no further parameters need to be
fetched in this circumstance. This register programs the data block
size (number of DMA accesses) between address steps, AST.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Number of sub ranges (15:8)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Number of sub ranges (7:0)
Parameter Description: NSR parameter (Refer to the above diagram)
Bit 15-0
Number of sub ranges
Total number of sub ranges = register value + 1; When this register is
set to $0000, one block will be transferred before the IRQ occurs. This
register controls the number of number of sub ranges (NSR), or
address steps that occur in the complete DMA transfer.
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Address step between sub ranges (15:8)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Address step between sub ranges (7:0)
Parameter Description: AST parameter (Refer to the above diagram)
Bit 15-0
Address step between sub ranges
This parameter should only be fetched if the Enable channel bit of the
BAH parameter is high. This register controls the address step size
between data blocks. The register value is added to the last DMA
address accessed in a block plus 1.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com