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MFC2000 Datasheet(PDF) 413 Page - List of Unclassifed Manufacturers |
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MFC2000 Datasheet(HTML) 413 Page - List of Unclassifed Manufacturers |
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413 / 426 page ![]() Hardware Description MFC 2000 Multifunctional Peripheral Controller 2000 100723A Conexant 24-27 As seen in the preceding tables, special care must be taken when connecting a FPDRAM or SDRAM to the MFC2000 for use with (S)DRAMC. In summary, when using FPDRAMs, A[8:0] of the DRAM should be connected to MA[8:0] of the (S)DRAMC. A[11:9] of the DRAM should be connected to MA[12:10] of the (S)DRAMC. When using SDRAMs, for 64 Mb type, A[8:0] of the SDRAM should be connected to MA[8:0] of the (S)DRAMC. A[9] of the SDRAM should be connected to MD0 of the (S)DRAMC. A[13:10] of the SDRAM should be connected to MA[12:9] of the (S)DRAMC. Consequently, the MD0 pin out of the (S)DRAMC is time multiplexed with address information during the row address portion of a SDRAM access and contains data information during the column address portion of a SDRAM access. This was done to conserve pin usage of the MFC2000. For the same reason, any DQM pins of an SDRAM should be connected to ground. The CKE pin of the SDRAM should be connected high. Also, if two bank 64Mb SDRAM is being used (the chart describes four bank), MA[11] should be connected to EA[12] since there will only be one bank pin (as compared to the four bank SDRAM in which there are two bank pins). For board layout: In order to maintain low delay and minimized crosstalk, the SDRAM should be placed no farther than 0.5 inch from the MFC2000. |
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