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CS5530A Datasheet(PDF) 133 Page - Advanced Micro Devices |
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CS5530A Datasheet(HTML) 133 Page - Advanced Micro Devices |
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133 / 259 page ![]() AMD Geode™ CS5530A Companion Device Data Book 133 Display Subsystem Extensions Revision 1.1 4.8 Display Subsystem Extensions The CS5530A incorporates extensions to the GX1 proces- sor’s’ display subsystem. These include: • Video Interface Configuration Registers — Line Buffers — Video Port Protocol —Video Format — X and Y Scaler / Filter — Color-Space-Converter • Video Accelerator • Gamma RAM • Display Interface — Video DACs — VESA DDC2B / DPMS — Flat Panel Support Figure 4-23 shows the data path of the display subsystem extensions. 4.8.1 Video Interface Configuration Registers Registers for configuring the video interface are accessed through F4 Index 10h, the Base Address Register (F4BAR) in Function 4. F4BAR sets the base address for the Video Interface Configuration Registers as shown in Table 4-71. Note: All Video Interface Configuration Registers have a 32-bit access granularity (only). The following subsections describe the video interface and the registers used for programming purposes. However, for complete bit information refer to Section 5.3.5 "Video Con- troller Registers - Function 4" on page 198. Figure 4-23. 8-Bit Display Subsystem Extensions Table 4-71. Base Address Register (F4BAR) for Video Controller Support Registers Bit Description F4 Index 10h-13h Base Address Register — F4BAR (R/W) Reset Value = 00000000h This register sets the base address of the memory mapped video controller registers. Bits [11:0] are read only (0000 0000 0000), indicating a 4 KB memory address range. Refer to Table 5-23 for the video controller register bit formats and reset values. 31:12 Video Controller and Clock Control Base I/O Address 11:0 Address Range (Read Only) VID_DATA[7:0] 8 Input Buffer 0 (3x360x32 bit) Buffer 1 Buffer 2 Formatter / Scaler Vertical Filter Horizontal Filter Color Space Converter Formatter 24 Color Key Color Compare 24 PIXEL[23:0] Bypass Gamma RAM 24 Video Dither 24 8 each DAC RGB to CRT FP_DATA 18 24 24 Enable Gamma Correction Register 24 24 Register |
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