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CS5530A Datasheet(PDF) 145 Page - Advanced Micro Devices |
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CS5530A Datasheet(HTML) 145 Page - Advanced Micro Devices |
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145 / 259 page ![]() AMD Geode™ CS5530A Companion Device Data Book 145 Register Summary Revision 1.1 5.2 Register Summary The tables in this subsection summarize all the registers of the CS5530A. Included in the tables are the register’s reset val- ues and page references where the bit formats are found. Table 5-2. Function 0: PCI Header and Bridge Configuration Registers Summary F0 Index Width (Bits) Type Name Reset Value Reference (Table 5-15) 00h-01h 16 RO Vendor Identification Register 1078h Page 155 02h-03h 16 RO Device Identification Register 0100h Page 155 04h-05h 16 R/W PCI Command Register 000Fh Page 155 06h-07h 16 R/W PCI Status Register 0280h Page 155 08h 8 RO Device Revision ID Register xxh Page 156 09h-0Bh 24 RO PCI Class Code Register 060100h Page 156 0Ch 8 R/W PCI Cache Line Size Register 00h Page 156 0Dh 8 R/W PCI Latency Timer Register 00h Page 156 0Eh 8 RO PCI Header Type Register 80h Page 156 0Fh 8 RO PCI BIST Register 00h Page 156 10h-1Fh -- -- Reserved xxh Page 156 20h-3Fh -- -- Reserved 00h Page 156 40h 8 R/W PCI Function Control Register 1 89h Page 156 41h 8 R/W PCI Function Control Register 2 10h Page 157 42h 8 R/W PCI Function Control Register 3 ACh Page 157 43h 8 R/W USB Shadow Register 03h Page 157 44h 8 R/W Reset Control Register 01h Page 158 45h-4Fh -- -- Reserved 00h Page 158 50h 8 R/W PIT Control/ISA CLK Divider 7Bh Page 158 51h 8 R/W ISA I/O Recovery Control Register 40h Page 159 52h 8 R/W ROM/AT Logic Control Register F8h Page 159 53h 8 R/W Alternate CPU Support Register 00h Page 159 54h-59h -- -- Reserved xxh Page 160 5Ah 8 R/W Decode Control Register 1 03h Page 160 5Bh 8 R/W Decode Control Register 2 20h Page 160 5Ch 8 R/W PCI Interrupt Steering Register 1 00h Page 160 5Dh 8 R/W PCI Interrupt Steering Register 2 00h Page 161 5Eh-6Fh -- -- Reserved xxh Page 161 70h-71h 16 R/W General Purpose Chip Select Base Address Register 0000h Page 161 72h 8 R/W General Purpose Chip Select Control Register 00h Page 161 73h-7Fh -- -- Reserved xxh Page 161 80h 8 R/W Power Management Enable Register 1 00h Page 161 81h 8 R/W Power Management Enable Register 2 00h Page 162 82h 8 R/W Power Management Enable Register 3 00h Page 163 83h 8 R/W Power Management Enable Register 4 00h Page 164 84h 8 RO Second Level Power Management Status Mirror Register 1 00h Page 165 85h 8 RO Second Level Power Management Status Mirror Register 2 00h Page 165 86h 8 RO Second Level Power Management Status Mirror Register 3 00h Page 166 87h 8 RO Second Level Power Management Status Mirror Register 4 00h Page 166 88h 8 R/W General Purpose Timer 1 Count Register 00h Page 167 89h 8 R/W General Purpose Timer 1 Control Register 00h Page 167 8Ah 8 R/W General Purpose Timer 2 Count Register 00h Page 168 8Bh 8 R/W General Purpose Timer 2 Control Register 00h Page 168 8Ch 8 R/W IRQ Speedup Timer Count Register 00h Page 168 8Dh 8 R/W Video Speedup Timer Count Register 00h Page 169 8Eh 8 R/W VGA Timer Count Register 00h Page 169 |
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