IC-PI datasheet(17/49 Pages) ICHAUS

17 / 49 page

preliminary

iC-PI PROGRAMMABLE 12-BIT

Sin/Cos INTERPOLATION IC WITH RS422 DRIVER

Rev B1, Page 17/48

SERIAL I2C INTERFACE

The multi-master capable I2C interface consists of two

bidirectional pins, SCL (for clock) and SDA (for data),

and enables iC-PI to restore its configuration from the

external serial EEPROM. For this function the readout

clock rate is selectable using ENFAST.

Furthermore, the I2C interface can be enabled to oper-

ate as an I2C slave (using ENSL), allowing an external

I2C master to read iC-PI’s position data, as well as edit

its configuration data.

ENFAST

Addr. 0x00, bit 4

Code

Function

Regular clock rate, f(SCL) approx. 80 kHz

High clock rate, f(SCL) approx. 320 kHz

Notes

For in-circuit programming bus lines SCL and SDA

require pull-up resistors. For line capacitances of up

to 170 pF, adequate values are:

4.7 kΩ with clock frequency 80 kHz

2 kΩ with clock frequency 320 kHz

The pull-up resistors may not be less than 1.5 kΩ. To

separate the signals a ground line between SCL and

SDA is recommended.

iC-PI requires a supply voltage during EEPROM

programming (5 V to VDD).

Table 5: I2C Fast Mode

ENSL

Addr. 0x02, bit 6

Code

Function

I2C slave mode disabled

I2C slave mode enabled (Device ID 0x55)

Table 6: I2C Slave Mode

EEPROM Selection

EEPROM Device Requirements

Supply Voltage

3.3 V to 5.5 V

Power-On Threshold

< 3.3 V (due to Elec.Char. 901)

Addressing

11 bit address max.

Device Address

0x50 (’1010 000’ w/o R/W bit),

0xA0 (’1010 0000’ with R/W = 0)

Page Buffer

Support of Page Write with pages of at

least 4 bytes.

Size Minimum

512 bit (64x8 bit)

(address range used is 0x00 to 0x3F)

Size Maximum

16 Kbit (8x 256x8 bit), type 24C16

Table 7: EEPROM Device Requirements

EEPROMs beyond 16 Kbit can not be used as those re-

quire a 2 byte address. If the EEPROM does not feature

Page Write, error events can not be saved (EMASKE

must be configured to 0x00). The following devices

are recommended: Atmel AT24C01, ST M24C01, ST

M24C02 (2K), ROHM BR24L01A-W, BR24L02-W.

ATTENTION: EEPROMs which consider block selec-

tion bits as "don’t care" should not be used.

Note: When programming the EEPROM in-circuit,

note that iC-PI must be powered up in advance of the

EEPROM to avoid interferences by its I2C master.

Device Startup

Once the supply has been switched on, the iC-PI out-

puts are high impedance (tristate) until a valid configu-

ration is read from the EEPROM using device ID 0x50.

If the configuration data is not confirmed by its check-

sum, the readin process is repeated. If no valid con-

figuration data is available after a fourth attempt, iC-PI

terminates communication with the EEPROM and en-

ables I2C slave mode. For timing information, refer to

the Electrical Characteristics, items D10 and D11.

For devices loading a valid configuration from the EEP-

ROM, bit ENSL defines whether the I2C slave function

is enabled or not.

Configuration Data Checksum

The checksum at address 0x2F is used to initially con-

firm the configuration data read from the EEPROM, as

well as to permanently monitor the configuration data in

the RAM during operation. Detecting a bit flip can take

half a millisecond, approximately.

CHKSUM

Addr. 0x2F, bit 7:0

Code

Function

0x00...

...0xFF

Checksum for address range 0x00 to 0x2E;

CRC polynomial 0x11D (x8 + x4 + x3 + x2 + 1)

Start value: 0x01

Table 8: Configuration Data Checksum

Example of CRC calculation routine:

unsigned char ucDataStream = 0 ;

i n t iCRCPoly = 0x11D ;

unsigned char ucCRC=0;

i n t i = 0 ;

ucCRC = 1 ; / / s t a r t value ! ! !

f o r ( iReg = 0 ; iReg <47; iReg ++)

{

ucDataStream = ucGetValue ( iReg ) ;

f o r ( i =0; i <=7; i ++) {

i f ( ( ucCRC & 0x80 ) ! = ( ucDataStream & 0x80 ) )

ucCRC = (ucCRC << 1) ^ iCRCPoly ;

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