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BMA255 Datasheet(PDF) 26 Page - Bosch Sensortec GmbH |
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BMA255 Datasheet(HTML) 26 Page - Bosch Sensortec GmbH |
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26 / 119 page ![]() BMA255 Data sheet Page 26 BST-BMA255-DS004-05 | Revision 1.2 | August 2014 Bosch Sensortec © Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany. Note: Specifications within this document are subject to change without notice. 4.7 Interrupt controller The BMA255 is equipped with eight programmable interrupt engines. Each interrupt can be independently enabled and configured. If the trigger condition of an enabled interrupt is fulfilled, the corresponding status bit is set to ´1´ and the selected interrupt pin is activated. The BMA255 provides two interrupt pins, INT1 and INT2; interrupts can be freely mapped to any of these pins. The state of a specific interrupt pin is derived from a logic ´or´ combination of all interrupts mapped to it. The interrupt status registers are updated when a new data word is written into the acceleration data registers. If an interrupt is disabled, all active status bits associated with it are immediately reset. 4.7.1 General features An interrupt is cleared depending on the selected interrupt mode, which is common to all interrupts. There are three different interrupt modes: non-latched, latched, and temporary. The mode is selected by the (0x21) latch_int bits according to Table 10. Table 10: Interrupt mode selection (0x21) latch_int Interrupt mode 0000b non-latched 0001b temporary, 250ms 0010b temporary, 500ms 0011b temporary, 1s 0100b temporary, 2s 0101b temporary, 4s 0110b temporary, 8s 0111b latched 1000b non-latched 1001b temporary, 250µs 1010b temporary, 500µs 1011b temporary, 1ms 1100b temporary, 12.5ms 1101b temporary, 25ms 1110b temporary, 50ms 1111b latched An interrupt is generated if its activation condition is met. It can not be cleared as long as the activation condition is fulfilled. In the non-latched mode the interrupt status bit and the selected pin (the contribution to the ´or´ condition for INT1 and/or INT2) are cleared as soon as the activation condition is no more valid. Exceptions to this behavior are the new data, orientation, and flat interrupts, which are automatically reset after a fixed time. |
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