AD5753 datasheet(4/72 Pages) AD

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AD5753

Data Sheet

Rev. 0 | Page 4 of 72

SPECIFICATIONS

AVDD1 = VDPC+ = 15 V, dc-to-dc converter disabled, AVDD2 = 5 V, AVSS = VDPC− = −15 V, VLOGIC = 1.71 V to 5.5 V, AGND = DGND =

REFGND = PGND1 = 0 V, REFIN = 2.5 V external, voltage output: load resistance (RLOAD) = 1 kΩ, load capacitor (CLOAD) = 220 pF,

current output: RLOAD = 300 Ω. All specifications at TA = −40°C to +115°C, TJ (junction temperature) < 125°C, unless otherwise noted.

Table 1.

Parameter

Min

Typ

Max

Unit

Test Conditions/Comments

OUTPUT VOLTAGE (VOUT)

Trimmed VOUT ranges

−5

−10

+10

Output Voltage Overranges

Untrimmed overranges

−6

−12

+12

Output Voltage Offset Ranges

−0.3

+5.7

Untrimmed negatively offset ranges

−0.4

+11.6

Resolution

Bits

VOLTAGE OUTPUT ACCURACY

Loaded and unloaded, accuracy specifications

refer to trimmed VOUT ranges only, unless

otherwise noted

Total Unadjusted Error (TUE)

−0.05

+0.05

% FSR

−0.01

+0.01

% FSR

TA = 25°C

TUE Long-Term Stability1

ppm FSR

Drift after 1000 hours, TJ = 150°C

Output Drift

0.35

1.5

ppm FSR/°C

Output drift

Integral Nonlinearity (INL)

−0.006

+0.006

% FSR

All ranges

Differential Nonlinearity (DNL)

−1

LSB

Guaranteed monotonic, all ranges

Zero-Scale Error

−0.02

±0.002

+0.02

% FSR

Zero-Scale Error Temperature

Coefficient (TC)2

±0.3

ppm FSR/°C

Bipolar Zero Error

−0.017

+0.001

+0.017

% FSR

±5 V, ±10 V

Bipolar Zero Error TC2

±0.4

ppm FSR/°C

±5 V, ±10 V

Offset Error

−0.022

±0.002

+0.022

% FSR

Offset Error TC2

±0.3

ppm FSR/°C

Gain Error

−0.022

±0.001

+0.022

% FSR

Gain Error TC2

±0.6

ppm FSR/°C

Full-Scale Error

−0.022

±0.001

+0.022

% FSR

Full-Scale Error TC2

±0.5

ppm FSR/°C

VOLTAGE OUTPUT

CHARACTERISTICS

Headroom

Minimum voltage required between VIOUT and

VDPC+ supply

Footroom

Minimum voltage required between VIOUT and

VDPC− supply

Short-Circuit Current

Load2

kΩ

For specified performance

Capacitive Load Stability2

µF

External compensation capacitor of 220 pF

connected

DC Output Impedance

mΩ

DC Power Supply Rejection

Ratio (PSRR)

µV/V

VOUT and −VSENSE Common-

Mode Rejection Ratio

(CMRR)

µV/V

Error in VOUT voltage due to changes in −VSENSE

voltage

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