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AD5753 Datasheet(PDF) 9 Page - Analog Devices

Part # AD5753
Description  Single-Channel, 16-Bit Current and Voltage DAC
PDF  72 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5753 Datasheet(HTML) 9 Page - Analog Devices

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Data Sheet
AD5753
Rev. 0 | Page 9 of 72
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
POWER REQUIREMENTS
Supply Voltages
AVDD16
7
33
V
Maximum operating range of |AVDD1 to AVSS| = 60 V
AVDD2
5
33
V
Maximum operating range of |AVDD2 to AVSS| = 50 V
AVSS6
−33
0
V
Maximum operating range of |AVDD1 to AVSS| = 60 V;
for bipolar output ranges, VOUT or IOUT headroom
must be obeyed when calculating AVSS
maximum; for unipolar current output ranges,
AVSS maximum = 0 V; for unipolar voltage output
ranges, AVSS maximum = −2.5V
VLOGIC
1.71
5.5
V
Supply Quiescent Currents6
Quiescent current, assuming no load current
AIDD17
0.05
0.11
mA
Voltage output mode, dc-to-dc converter
enabled but not active
0.05
0.11
mA
Current output mode, dc-to-dc converter
enabled but not active
AIDD27
3.3
3.6
mA
Voltage output mode, dc-to-dc converter
enabled but not active
2.9
3.1
mA
Current output mode, dc-to-dc converter
enabled but not active
AISS7
−0.11
−0.05
mA
Voltage output mode
−0.11
0.05
mA
Current output mode
ILOGIC7
0.01
mA
VIH = VLOGIC, VIL = DGND
IDPC+7
1.0
1.3
mA
Voltage output mode
0.8
1
mA
Unipolar current output mode
2.3
3.1
mA
Bipolar current output mode
IDPC−7
−1.3
−1.0
mA
Voltage output mode
−0.2
−0.15
mA
Unipolar current output mode
−3.1
−2.3
mA
Bipolar current output mode
Power Dissipation
Power dissipation assuming an ideal power
supply and excluding external load power
dissipation, current output DPC mode, negative
rail DPC disabled, 0 mA to 20 mA range; see the
Example Module Power Calculation section for
calculation methodology
120
mW
AVDD1 = 24 V, AVDD2 = 5 V, AVSS = −15 V, RLOAD = 1 kΩ,
IOUT = 20 mA
145
mW
AVDD1 = 24 V, AVDD2 = 5 V, AVSS = −15 V, RLOAD = 0 Ω,
IOUT = 20 mA
180
mW
AVDD1 = AVDD2 = 24 V, AVSS = −15 V, RLOAD = 1 kΩ,
IOUT = 20 mA
200
mW
AVDD1 = AVDD2 = 24 V, AVSS = −15 V, RLOAD = 0 Ω,
IOUT = 20 mA
105
AVDD1 = 24 V, AVDD2 = 5 V, AVSS = −24 V, RLOAD = 1 kΩ,
IOUT = −20 mA, negative rail DPC enabled
1
The long-term stability specification is noncumulative. The drift in subsequent 1000 hour periods is significantly lower than in the first 1000 hour period.
2
Guaranteed by design and characterization; not production tested.
3
See the Current Output section for more information about the internal and external RSET resistors.
4
The AD5753 is factory calibrated with an external 2.5 V reference connected to REFIN.
5
Where ISOURCE is the current source and ISINK is the current sink.
6
Production tested to AVDD1 maximum = 30 V and AVSS minimum = −30 V.
7
Where AIDD1 is the current on the AVDD1 supply, AIDD2 is the current on the AVDD2 supply, AISS is the current on the AVSS supply, ILOGIC is the current on the VLOGIC supply,
IDPC+ and IDPC− are the currents on the VDPC+ and VDPC− supplies, respectively.



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