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9880 Datasheet(PDF) 52 Page - Intel Corporation |
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9880 Datasheet(HTML) 52 Page - Intel Corporation |
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52 / 118 page ![]() LXT9860/9880 — Advanced 10/100 Repeater with Integrated Management 52 Datasheet Document #: 248987 Revision#: 003 Rev Date: 08/07/01 3.10 Serial Management I/F The high-speed Serial Management Interface (SMI) provides access to repeater MIB variables, RMON Statistics attributes and status and control information. A network manager accesses the interface through a simple serial communications controller such as an 8530 SCC. The SMI allows multiple LXT98x0 devices to be managed from one common bus. 3.10.1 SMI Signals The interface consists of a data input line (SRX), data output line (STX), and a clock (SERCLK). The interface operates on a simple command response model, with the network manager as the master and the LXT98x0 devices as slaves. Figure 11 is a simplified view of typical serial management interface architecture. Refer to Figure 23 on page 68 for circuit details. Note: Refer to Application Note 64, High-Speed Serial Management Interface, for additional information. Figure 10. LXT9880 MII Operation MIIn_TXD<3:0> MIIn_TXEN MIIn_TXER MIIn_TXCLK MIIn_RXCLK MIIn_RXD<3:0> MIIn_RXDV MIIn_RXER MIIn_CRS MIIn_COL LXT98x0 10/100 MAC The two LXT98x0 MII ports act as the PHY side of the MII. An external MAC sends TX Data to the LXT98x0 to be repeated to the network. The LXT98x0 repeats network data to the MAC via the RX Data lines. Port 1 Port 2 Port 3 Port 4 Ports 1, 2 TP Ports MII Ports Port 6 Port 7 Port 8 Port 5 Figure 11. Typical SMI Bus Architecture LXT918 LXT918 LXT9880 RMON & Repeater MIB Support Serial Controller Network Management User Definable Partitioning |
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