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9880 Datasheet(PDF) 59 Page - Intel Corporation |
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9880 Datasheet(HTML) 59 Page - Intel Corporation |
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59 / 118 page ![]() Advanced 10/100 Repeater with Integrated Management — LXT9860/9880 Datasheet Document #: 248987 Revision#: 003 Rev Date: 08/07/01 59 on the board listen in and record the ID. The device with ChipID = 00 then transmits Arbitration Request messages on the SMI every 2-3 ms. The request messages from two boards may collide. If this happens, a resolution scheme ensures that only one message is transmitted. The network manager must respond to each request with a message that includes the 48-bit ID and the HubID. All devices hear this message, but only those matching the 48-bit ID receive the HubID as their own. Once a HubID is assigned to a hub, that hub ceases requesting a HubID. This process continues until all hubs are assigned an ID. Should a hub power off and back on, the hub re- requests an ID, which the manager provides. An address arbitration packet is selected over normal requests. 3.10.3.3 Address Re-Arbitration There are two mechanisms for address re-arbitration following a configuration change, such as a hot-swap of a board: • Manual Re-arbitration. If the LXT98x0 detects a Low-to-High transition on RECONFIG, or if RECONFIG is High at power-up, it sends out a “Configuration Change” message (Start Flag with all 0s) on the bus. The network manager can use this message to detect that re-arbitration is required. • Network Manager. The network manager can detect or re-start arbitration at any time by sending the “Re-arbitrate” command. 3.10.4 Interrupt Functions The LXT98x0 provides a single open-collector pin for external interrupt signalling. Several different interrupt conditions may be reported. The Interrupt Status Register (see Table 86) identifies the specific interrupt condition. The Interrupt Mask Register (see Table 87 on page 115) allows specific interrupts to be masked. Interrupts may be cleared in two ways, depending on the status of bit 11 in the repeater configuration register. 3.11 Serial PROM Interface The serial PROM interface allows the vendor to load in optional information unique to each board. Items such as serial number or manufacture date can be placed in the serial PROM which can also be used in the address arbitration process. Each board must contain a unique set of information. Additionally, only 1 serial PROM is required per board, they are not required per chip. The LXT98x0 reads in the first 48 bits (three 16-bit words) from the PROM and stores them in a register. This read occurs only on power-up. Only the LXT98x0 with a ChipID of 00 drives the serial PROM control lines; all other LXT98x0s “listen” to the data and clock lines. The first bit into the LXT98x0 from this interface corresponds to bit 47. The serial PROM shifts out the most significant bit (15) of the word first (the PROM must be auto-incrementing). |
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