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DRV8353FSRTAR Datasheet(PDF) 4 Page - Texas Instruments

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Part # DRV8353FSRTAR
Description  DRV835xF 100-V Three-Phase Smart Gate Driver
PDF  97 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DRV8353FSRTAR Datasheet(HTML) 4 Page - Texas Instruments

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PIN
TYPE(1)
DESCRIPTION
NAME
NO.
DRV8350FH
DRV8350FS
IDRIVE
19
—
I
Gate drive output current setting. This pin is a 7 level input pin set by an external resistor.
INHA
23
23
I
High-side gate driver control input. This pin controls the output of the high-side gate driver.
INHB
25
25
I
High-side gate driver control input. This pin controls the output of the high-side gate driver.
INHC
27
27
I
High-side gate driver control input. This pin controls the output of the high-side gate driver.
INLA
24
24
I
Low-side gate driver control input. This pin controls the output of the low-side gate driver.
INLB
26
26
I
Low-side gate driver control input. This pin controls the output of the low-side gate driver.
INLC
28
28
I
Low-side gate driver control input. This pin controls the output of the low-side gate driver.
MODE
18
—
I
PWM input mode setting. This pin is a 4 level input pin set by an external resistor.
NC
21
—
NC
No internal connection. This pin can be left floating or connected to system ground.
nFAULT
17
17
OD
Fault indicator output. This pin is pulled logic low during a fault condition and requires an external pullup resistor.
nSCS
—
21
I
Serial chip select. A logic low on this pin enables serial interface communication.
SCLK
—
20
I
Serial clock input. Serial data is shifted out and captured on the corresponding rising and falling edge on this pin.
SDI
—
19
I
Serial data input. Data is captured on the falling edge of the SCLK pin.
SDO
—
18
OD
Serial data output. Data is shifted out on the rising edge of the SCLK pin. This pin requires an external pullup resistor.
SHA
6
6
I
High-side source sense input. Connect to the high-side power MOSFET source.
SHB
11
11
I
High-side source sense input. Connect to the high-side power MOSFET source.
SHC
14
14
I
High-side source sense input. Connect to the high-side power MOSFET source.
SLA
8
8
I
Low-side source sense input. Connect to the low-side power MOSFET source.
SLB
9
9
I
Low-side source sense input. Connect to the low-side power MOSFET source.
SLC
16
16
I
Low-side source sense input. Connect to the low-side power MOSFET source.
VCP
4
4
PWR
Charge pump output. Connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VCP and VDRAIN pins.
VDRAIN
3
3
I
High-side MOSFET drain sense input and charge pump reference. Connect to the common point of the MOSFET drains.
VDS
20
—
I
VDS monitor trip point setting. This pin is a 7 level input pin set by an external resistor.
VGLS
31
31
PWR
11-V internal regulator output. Connect a X5R or X7R, 1-µF, 16-V ceramic capacitor between the VGLS and GND pins.
VM
2
2
PWR
Gate driver power supply input. Connect to either VDRAIN or separate gate driver supply voltage. Connect a X5R or X7R,
0.1-µF, VM-rated ceramic and greater then or equal to 10-uF local capacitance between the VM and GND pins.
(1)
PWR = power, I = input, O = output, NC = no connection, OD = open-drain
1
GND
36
INHB
2
VGLS
35
INLA
3
CPL
34
INHA
4
CPH
33
ENABLE
5
VM
32
NC
6
VDRAIN
31
VDS
7
VCP
30
IDRIVE
8
GHA
29
MODE
9
SHA
28
nFAULT
10
GLA
27
AGND
11
SLA
26
NC
12
NC
25
NC
Not to scale
Thermal
Pad
Figure 6-3. DRV8350RFH RGZ Package 48-Pin
VQFN With Exposed Thermal Pad Top View
1
GND
36
INHB
2
VGLS
35
INLA
3
CPL
34
INHA
4
CPH
33
ENABLE
5
VM
32
nSCS
6
VDRAIN
31
SCLK
7
VCP
30
SDI
8
GHA
29
SDO
9
SHA
28
nFAULT
10
GLA
27
AGND
11
SLA
26
NC
12
NC
25
NC
Not to scale
Thermal
Pad
Figure 6-4. DRV8350RFS RGZ Package 48-Pin
VQFN With Exposed Thermal Pad Top View
DRV8350F, DRV8353F, DRV8350RF, DRV8353RF
SLVSFV1 – SEPTEMBER 2020
www.ti.com
4
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Copyright © 2020 Texas Instruments Incorporated
Product Folder Links: DRV8350F DRV8353F DRV8350RF DRV8353RF



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