DRV8353FSRTAR datasheet(76/97 Pages) TI

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Table 9-3. DRV835xR Buck Regulator External Components (continued)

COMPONENT

PIN 1

PIN 2

RECOMMENDED

CBST (2)

BST

X5R or X7R, 0.01-µF, 16-V rated capacitor

CVCC (2)

VCC

GND

X5R or X7R, 0.47-µF, 16-V rated capacitor

DSW (2)

GND

Schottky diode

LSW (2)

OUT(1)

Output filter inductor

COUT (2)

OUT(1)

GND

X5R or X7R, OUT-rated capacitor

ROUT (2)

OUT(1)

GND

Output ripple resistor

RFB1 (2)

OUT(1)

Resistor divider to set buck output voltage

RFB2 (2)

GND

(1)

OUT is not a pin on the DRV8350RF and DRV8353RF devices, but the regulated output voltage of the buck regulator after the output

inductor.

(2)

For detailed design procedures, refer to the LM5008A 100-V 350-mA Constant On-Time Buck Switching Regulator data sheet.

9.2.1.2.1 External MOSFET Support

The DRV835xF family of devices MOSFET support is based on the MOSFET gate charge, VCP charge-pump

capacity, VGLS regulator capacity, and output PWM switching frequency. For a quick calculation of MOSFET

driving capacity, use Equation 11 and Equation 12 for three phase BLDC motor applications.

Trapezoidal 120° Commutation: IVCP/VGLS > Qg × ƒPWM

(11)

Sinusoidal 180° Commutation: IVCP/VGLS > 3 × Qg × ƒPWM

(12)

where

• ƒPWM is the maximum desired PWM switching frequency.

• Qg is the MOSFET total gate charge

• IVCP/VGLS is the charge pump or low-side regulator capacity, dependent on the VM pin voltage.

• The MOSFET multiplier based on the commutation control method, may vary based on implementation.

9.2.1.2.1.1 MOSFET Example

If a system is using VVM = 48 V (IVCP = 25 mA) and a maximum PWM switching frequency of 45 kHz, then the

VCP charge-pump and VGLS regulator can support MOSFETs using trapezoidal commutation with a Qg < 556

nC, and MOSFETs using sinusoidal commutation with a Qg < 185 nC.

9.2.1.2.2 IDRIVE Configuration

The gate drive current strength, IDRIVE, is selected based on the gate-to-drain charge of the external MOSFETs

and the target rise and fall times at the outputs. If IDRIVE is selected to be too low for a given MOSFET, then the

MOSFET may not turn on completely within the tDRIVE time and a gate drive fault may be asserted. Additionally,

slow rise and fall times will lead to higher switching power losses. TI recommends adjusting these values in

system with the required external MOSFETs and motor to determine the best possible setting for any application.

The IDRIVEP and IDRIVEN current for both the low-side and high-side MOSFETs are independently adjustable on

SPI devices through the SPI registers. On hardware interface devices, both source and sink settings are

selected at the same time on the IDRIVE pin.

For MOSFETs with a known gate-to-drain charge Qgd, desired rise time (tr), and a desired fall time (tf), use

Equation 13 and Equation 14 to calculate the value of IDRIVEP and IDRIVEN (respectively).

DRIVEP

(13)

DRIVEN

(14)

DRV8350F, DRV8353F, DRV8350RF, DRV8353RF

SLVSFV1 – SEPTEMBER 2020

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