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DS3172 Datasheet(PDF) 163 Page - Dallas Semiconductor |
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DS3172 Datasheet(HTML) 163 Page - Dallas Semiconductor |
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163 / 232 page ![]() DS3171/DS3172/DS3173/DS3174 163 of 232 Register Name: HDLC.RSRIE Register Description: HDLC Receive Status Register Interrupt Enable Register Address: (0,2,4,6)B8h Bit # 15 14 13 12 11 10 9 8 Name -- -- -- -- -- -- -- -- Default 0 0 0 0 0 0 0 0 Bit # 7 6 5 4 3 2 1 0 Name RFOIE -- -- RPEIE RPSIE RFFIE -- RHDAIE Default 0 0 0 0 0 0 0 0 Bit 7: Receive FIFO Overflow Interrupt Enable (RFOIE) – This bit enables an interrupt if the RFOL bit is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. 0 = interrupt disabled 1 = interrupt enabled Bit 4: Receive Packet End Interrupt Enable (RPEIE) – This bit enables an interrupt if the RPEL bit is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. 0 = interrupt disabled 1 = interrupt enabled Bit 3: Receive Packet Start Interrupt Enable (RPSIE) – This bit enables an interrupt if the RPSL bit is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. 0 = interrupt disabled 1 = interrupt enabled Bit 2: Receive FIFO Full Interrupt Enable (RFFIE) – This bit enables an interrupt if the RFFL bit is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. 0 = interrupt disabled 1 = interrupt enabled Bit 0: Receive HDLC Data Available Interrupt Enable (RHDAIE) – This bit enables an interrupt if the RHDAL bit is set and the bit in GL.ISRIE.PSRIE[4:1] that corresponds to this port is set. 0 = interrupt disabled 1 = interrupt enabled |
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