DS3172 datasheet(172/232 Pages) DALLAS

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12.8.2.1 Register Bit Descriptions

TT.RCR

Trail Trace Receive Control Register

(0,2,4,6)F0h

Bit #

Name

Default

Bit #

Name

Reserved

RMAD

RETCE

RDIE

RBRE

Default

Bit 3: Receive Multi-frame Alignment Disable (RMAD) – When 0, multi-frame alignment is performed. When 1,

multi-frame alignment is disabled and the trail trace bytes are stored starting with a random byte.

Bit 2: Receive Expected Trail Trace Comparison Enable (RETCE) – When 0, expected trail trace comparison is

disabled. When 1, expected trail trace comparison is performed. Note: When the RMAD bit is one, expected trail

trace comparison is disabled regardless of the setting of this bit.

Bit 1: Receive Data Inversion Enable (RDIE) – When 0, the incoming data is directly passed on for trail trace

processing. When 1, the incoming data is inverted before being passed on for trail trace processing.

Bit 0: Receive Bit Reordering Enable (RBRE) – When 0, bit reordering is disabled (The first bit received is the

MSB TT.RIR.RTD[7] of the byte). When 1, bit reordering is enabled (The first bit received is the LSB

TT.RIR.RTD[0] of the byte).

TT.RTIAR

Trail Trace Receive Identifier Address Register

(0,2,4,6)F2h

Bit #

Name

Reserved

ETIA3

ETIA2

ETIA1

ETIA0

Default

Bit #

Name

Reserved

RTIA3

RTIA2

RTIA1

RTIA0

Default

Bits 11 to 8: Expected Trail Trace Identifier Address (ETIA[3:0]) – These four bits indicate the expected trail

trace identifier byte to be read/written by the next memory access. Address 0h indicates the first byte of the

expected trail trace identifier. Note: The value of these bits increments with each expected trail trace identifier

memory access (when these bits are Fh, a memory access will return them to 0h).

Bits 3 to 0: Receive Trail Trace Identifier Address (RTIA[3:0]) – These four bits indicate the receive trail trace

identifier byte to be read by the next memory access. Address 0h indicates the first byte of the receive trail trace

identifier. Note: The value of these bits increments with each received trail trace identifier memory access (when

these bits are Fh, a memory access will return them to 0h).

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