VR4102 datasheet(174/701 Pages) NEC

174 / 701 page

CHAPTER 6 EXCEPTION PROCESSING

174

Table 6-3. 64-Bit Mode Exception Vector Base Addresses

Vector base address (virtual)

Vector offset

Cold Reset

Soft Reset

NMI

0xFFFF FFFF BFC0 0000

(BEV is automatically set to 1)

0x0000

Cache Error

0xFFFF FFFF A000 0000 (BEV = 0)

0xFFFF FFFF BFC0 0200 (BEV = 1)

0x0100

TLB Refill (EXL = 0)

0xFFFF FFFF 8000 0000 (BEV = 0)

0x0000

XTLB Refill (EXL = 1)

0xFFFF FFFF BFC0 0200 (BEV = 1)

0x0080

Other exceptions

0x0180

Table 6-4. 32-Bit Mode Exception Vector Base Addresses

Vector base address (virtual)

Vector offset

Cold Reset

Soft Reset

NMI

0xBFC0 0000

(BEV is automatically set to 1)

0x0000

Cache Error

0xA000 0000 (BEV = 0)

0xBFC0 0200 (BEV = 1)

0x0100

TLB Refill (EXL = 0)

0x8000 0000 (BEV = 0)

0x0000

XTLB Refill (EXL = 1)

0xBFC0 0200 (BEV = 1)

0x0080

Other exceptions

0x0180

Examples 1. TLB Refill Exception Vector

When BEV bit = 0, the vector base address (virtual) for the TLB Refill exception is in kseg0

(unmapped) space.

— 0x8000 0000 in 32-bit mode

— 0xFFFF FFFF 8000 0000 in 64-bit mode

When BEV bit = 1, the vector base address (virtual) for the TLB Refill exception is in kseg1 (uncached,

unmapped) space.

— 0xBFC0 0200 in 32-bit mode

— 0xFFFF FFFF BFC0 0200 in 64-bit mode

This is an uncached, non-TLB-mapped space, allowing the exception handler to bypass the cache and

TLB.

VR4102 Datasheet(PDF) 174 Page - NEC

VR4102 Datasheet(HTML) 174 Page - NEC

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL