 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
VR4102 Datasheet(PDF) 194 Page - NEC |
|
|
|||||||||||||||||||||||||||||
VR4102 Datasheet(HTML) 194 Page - NEC |
|
|
194 / 701 page  CHAPTER 6 EXCEPTION PROCESSING 194 Figure 6-15. TLB/XTLB Refill Exception Handler (1/2) (a) Hardware Instruction in branch delay slot? EXL ← 1 BEV (SR22) EXL = 0? (SR1) EXL = 0? (SR1) No Yes ; Check for multiple exceptions. XTLB exception? XTLB Mismatch vector offset = 0x080 TLB Mismatch vector offset = 0x000 General Exception vector offset = 0x180 ; Kernel mode is set and interrpts are disabled. = 0 (normal) = 1 (bootstrap) Yes No No Yes No Yes Start EntryHi ← VPN2, ASID X/Context ← VPN2 Set Cause Register (ExcCode) EntryHi ← VPN2, ASID X/Context ← VPN2 Set Cause Register (ExcCode) BD bit ← 1 EPC ← PC – 4 BD bit ← 0 EPC ← PC PC ← 0xFFFF FFFF 8000 0000 + vector offset (Unmapped, cacheable space) PC ← 0xFFFF FFFF BFC0 0200 + vector offset (Unmapped, uncached space) To guideline of TLB/XTLB exception hadler |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
