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VR4102 Datasheet(PDF) 197 Page - NEC |
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VR4102 Datasheet(HTML) 197 Page - NEC |
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197 / 701 page  CHAPTER 6 EXCEPTION PROCESSING 197 Figure 6-17. Cold Reset, Soft Reset, and NMI Exception Handler Set Status register BEV bit ← 1 TS bit ← 0 SR bit ← 1 ERL bit ← 1 Random register ← 31 Wired register ← 0 Update Config register bits 31:28 22:6 Set Status register BEV bit ← 1 TS bit ← 0 SR bit ← 0 ERL bit ← 1 Soft reset or NMI exception PC ← 0xFFFF FFFF BFC0 0000 NMI? Yes SR = 1? (SR20) No Yes Servicing by Soft reset exception routine Servicing by Cold reset exception routine Servicing by NMI exception routine ERET No ; The processor provides no means of distinguishing between an NMI exception and Soft reset exception, such that this must be determined at the system level. Software Hardware No Yes ERL = 1? (SR2) No Yes No Yes No Yes Instruction in branch delay slot? BD bit ← 1 Error EPC ← PC – 4 BD bit ← 0 Error EPC ← PC Cold reset exception ERL = 1? (SR2) Instruction in branch delay slot? BD bit ← 1 Error EPC ← PC – 4 BD bit ← 0 Error EPC ← PC |
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