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VR4102 Datasheet(PDF) 400 Page - NEC

Part # VR4102
Description  64/32-bit Microprocessor
PDF  701 Pages
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Manufacturer  NEC [NEC]
Direct Link  http://www.nec.com/
Logo NEC - NEC

VR4102 Datasheet(HTML) 400 Page - NEC

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CHAPTER 19 PIU (TOUCH PANEL INTERFACE UNIT)
400
19.3.10 PIUABnREG (0x0B00 02B0 to 0x0B00 02B6)
Remark
n = 0 to 3
PIUAB0REG
(0x0B00 02B0)
PIUAB1REG
(0x0B00 02B2)
PIUAB2REG
(0x0B00 02B4)
PIUAB3REG
(0x0B00 02B6)
Bit
D15
D14
D13
D12
D11
D10
D9
D8
Name
VALID
Reserved
Reserved
Reserved
Reserved
Reserved
PADDATA[9]
PADDATA[8]
R/W
R/W
RRR
RR
R/W
R/W
RTCRST
0
0
0
0
0
0
0
0
Other resets
0
000
00
0
0
Bit
D7D6D5D4D3D2D1
D0
Name
PADDATA[7] PADDATA[6] PADDATA[5] PADDATA[4] PADDATA[3] PADDATA[2] PADDATA[1] PADDATA[0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RTCRST
0000000
0
Other resets
0000000
0
Bit
Name
Function
D[15]
VALID
Indicates validity of data in PADDATA
1 : Valid
0 : Invalid
D[14..10]
Reserved
Write 0 when writing. 0 is returned after a read.
D[9..0]
PADDATA[9..0]
A/D converter’s sampling data
This register is used to store general-purpose A/D port sampling data, audio input port sampling data, and
command scan data. There are four data buffers and the addresses (register address) where the data is stored are
fixed.
The VALID bit, which indicates when the data is valid, is automatically rendered invalid when the page buffer
interrupt cause (PIUADPINTR in PIUINTREG) is cleared.
Table 19-5. A/D Ports and Data Buffers
Register
During ADPortScan
During CMDScan
TPPScan = 0
TPPScan = 1
PIUAB0REG
PIUAB1REG
PIUAB2REG
PIUAB3REG
ADIN0
ADIN1
ADIN2
AUDIOIN
TPX0
TPX1
TPY0
TPY1
CMDScanDATA
ð
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