VR4102 datasheet(407/701 Pages) NEC

407 / 701 page

CHAPTER 19 PIU (TOUCH PANEL INTERFACE UNIT)

407

19.8 COMPARISON OF VR4102 AND VR4101

Table 19-6. Comparison of PIUs of VR4102 and VR4101

Item

VR4102

VR4101

A/D converter

On-chip (10 bits)

External (10/12 bits)

Data transfer

Transfer to buffer in PIU

DMA transfer

Data buffers

Four buffers (two pages each) for

coordinate data only

Four buffers for A/D scan

One buffer

Scan types

Coordinate data scan

Command scan

A/D scan

Coordinate data scan

Command scan

Main battery scan

Sub battery scan

A/D port scan activation states

Standby, WaitPen Touch, Interval

Standby

Panel applied voltage stabilization

standby time counter

6 bits

4 bits

Panel applied voltage during low-

voltage mode

All four touch panel pins are at low level

All four touch panel pins are at Hi-Z

Panel state during disable state

Touch detection state

(Interrupts do not occur when CPU is in

Hibernate mode.)

All four touch panel pins are at Hi-Z

Handling of valid data when data loss

occurs

Valid data is always retained

Valid data is overwritten

Data interrupt

Three types of special-purpose interrupts

(two coordinate data interrupts, A/D scan

interrupt, and command scan interrupt)

Two types of page boundary interrupts

PIUDataRdyIntr

Yes

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