SLG47503 datasheet(129/191 Pages) DIALOG

129 / 191 page

Datasheet

16-Jul-2021

CFR0011-120-00

Revision 2.0

129 of 191

SLG47502/03

Low Voltage GreenPAK Programmable

Mixed-Signal Matrix

Preliminary

328

Multi-function1

OUT48:

IN2 of MLT1_LUT3_10 or Data Input of DFF15 or Delay1 Input

(or Counter1 nRST Input)

329

330

331

332

333

334

Multi-function2

OUT49:

IN0 of MLT2_LUT3_11 or Clock Input of DFF16 or Delay2

Input (or Counter2 nRST Input)

335

336

337

338

339

340

OUT50:

IN1 of MLT2_LUT3_11 or nRST(nSET) of DFF16 or Delay2

Input (or Counter2 nRST Input or External Clock Source

341

342

343

344

345

346

OUT51:

IN2 of MLT2_LUT3_11 or Data Input of DFF16 or Delay2 Input

(or Counter2 nRST Input)

347

348

349

350

351

352

Multi-function3

OUT52:

IN0 of MLT3_LUT3_12 or Clock Input of DFF17 or Delay3

Input (or Counter3 nRST Input)

353

354

355

356

357

358

OUT53:

IN1 of MLT3_LUT3_12 or nRST(nSET) of DFF17 or Delay3

Input (or Counter3 nRST Input or External Clock Source)

359

360

361

362

363

364

OUT54:

IN2 of MLT3_LUT3_12 or Data Input of DFF17 or Delay3 Input

(or Counter3 nRST Input)

365

366

367

368

369

370

Multi-function4

OUT55:

IN0 of MLT4_LUT3_13 or Clock Input of DFF18 or Delay4

Input (or Counter4 nRST Input)

371

372

373

374

375

Table 37: Register Map (Continued)

Address

Signal Function

Byte

Bit

SLG47503 Datasheet(PDF) 129 Page - Dialog Semiconductor

SLG47503 Datasheet(HTML) 129 Page - Dialog Semiconductor

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL