P5021 datasheet(150/155 Pages) NXP

150 / 155 page

P5021 QorIQ Integrated Processor Data Sheet, Rev. 1

Hardware design considerations

Freescale Semiconductor

150

3.7

Recommended thermal model

Information about Flotherm models of the package or thermal data not available in this document can be obtained from your

local Freescale sales office.

3.8

Thermal management information

This section provides thermal management information for the flip-chip, plastic-ball, grid array (FC-PBGA) package for

air-cooled applications. Proper thermal control design is primarily dependent on the system-level design—the heat sink, airflow,

and thermal interface material.

The recommended attachment method to the heat sink is illustrated in this figure. The heat sink should be attached to the

printed-circuit board with the spring force centered over the die. This spring force should not exceed 10 pounds force (45

Newton).

Figure 62. Exploded cross-sectional view—FC-PBGA (with lid) package

The system board designer can choose between several types of heat sinks to place on the device. There are several

commercially-available thermal interfaces to choose from in the industry. Ultimately, the final selection of an appropriate heat

sink depends on many factors, such as thermal performance at a given air velocity, spatial volume, mass, attachment method,

assembly, and cost.

3.8.1

Internal package conduction resistance

For the package, the intrinsic internal conduction thermal resistance paths are as follows:

•

The die junction-to-case thermal resistance

•

The die junction-to-lid-top thermal resistance

•

The die junction-to-board thermal resistance

Adhesive or

Heat sink

FC-PBGA package (small lid)

Heat sink

clip

Printed-circuit board

thermal interface material

Die

Die lid

P5021 Datasheet(PDF) 150 Page - NXP Semiconductors