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P5021 Datasheet(PDF) 145 Page - NXP Semiconductors |
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P5021 Datasheet(HTML) 145 Page - NXP Semiconductors |
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145 / 155 page ![]() Hardware design considerations P5021 QorIQ Integrated Processor Data Sheet, Rev. 1 Freescale Semiconductor 145 Figure 58. Aurora 70 pin connector duplex pinout 3 13 9 5 1 6 10 15 11 7 16 12 8 4 1 2 TX0+ TX0- GND VIO (VSense) TCK TMS TDI TDO TRST Vendor I/O 1 TX1+ TX1- GND RX0+ RX0- 17 18 20 19 21 22 GND RX1+ RX1- Vendor I/O 0 14 Vendor I/O 3 Vendor I/O 2 RESET 25 35 31 27 23 28 32 37 33 29 38 34 30 26 24 GND TX2+ TX2- GND CLK+ CLK- GND Vendor I/O 4 Vendor I/O 5 N/C GND TX3+ TX3- GND RX2+ 39 40 42 41 43 44 RX2- GND RX3+ GND 36 GND N/C N/C 47 57 53 49 50 54 59 55 51 60 56 52 48 45 46 RX3- GND TX4+ N/C GND N/C N/C GND N/C GND TX4- GND TX5+ TX5- GND 61 62 64 63 65 66 TX6+ TX6- GND N/C 58 N/C N/C GND 68 67 69 70 TX7+ TX7- N/C N/C |
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